IP Library Granted Patent US 12701783
Granted Patent B2
US 12701783 · App. 18/099,806 · Granted Aug 4, 2026

Semiconductor device with semiconductor components

Inventor: Ta-Chun Lin (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10D84/85H10D30/014H10D30/43H10D30/6735H10D62/121H10D84/0188H10D84/038
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Quick Facts
Patent No.
US 12701783
App. No.
18/099,806
Granted
Aug 4, 2026
Kind
B2
Abstract

A semiconductor device is provided. The semiconductor includes a plurality of semiconductor components and at least two dielectric walls disposed among the semiconductor components. Two of the dielectric walls, which are adjacent, extended along one direction or disposed at two sides of a device isolation, have varied wall widths or offset.

Claims (32)

1 . A semiconductor device, comprising:

a plurality of semiconductor components; and

at least two dielectric walls disposed among the semiconductor components, wherein two of the dielectric walls, which are adjacent, have varied wall widths or are offset;

wherein two of the dielectric walls, which are adjacent, have varied wall heights, and there is an inverse relationship between a plurality of active region widths of the semiconductor components and the wall widths.

2 . The semiconductor device according to claim 1 , further comprising:

at least one device isolation, disposed between two of the dielectric walls having varied wall widths.

3 . The semiconductor device according to claim 1 , wherein there is an inverse relationship between the wall widths and the wall heights.

4 . The semiconductor device according to claim 1 , wherein there is a positive relationship between the wall widths and the wall heights.

5 . The semiconductor device according to claim 1 , wherein a plurality of active region widths of the semiconductor components are different.

6 . The semiconductor device according to claim 1 , wherein total widths of the semiconductor components are identical.

7 . The semiconductor device according to claim 1 , wherein the active region widths of the semiconductor components are different.

8 . A semiconductor device, comprising:

a plurality of semiconductor components; and

at least two dielectric walls disposed among the semiconductor components, wherein two of the dielectric walls, which are extended along one direction, have varied wall widths or are offset;

wherein two of the dielectric walls, which are extended along one direction, have varied wall heights, and there is an inverse relationship between a plurality of active region widths of the semiconductor components and the wall widths.

9 . The semiconductor device according to claim 8 , further comprising:

at least one device isolation, disposed between two of the dielectric walls having varied wall widths.

10 . The semiconductor device according to claim 8 , wherein there is an inverse relationship between the wall widths and the wall heights.

11 . The semiconductor device according to claim 8 , wherein there is a positive relationship between the wall widths and the wall heights.

12 . The semiconductor device according to claim 8 , wherein a plurality of active region widths of the semiconductor components are different.

13 . The semiconductor device according to claim 8 , wherein total widths of the semiconductor components are identical.

14 . The semiconductor device according to claim 8 , wherein the active region widths of the semiconductor components are different.

15 . A semiconductor device, comprising:

a plurality of semiconductor components;

at least one device isolation, disposed between two of the semiconductor components; and

at least two dielectric walls disposed among the semiconductor components, wherein two of the dielectric walls, which are disposed at two sides of the device isolation, have varied wall widths or are offset;

wherein two of the dielectric walls, which are disposed at two sides of the device isolation, have varied wall heights, and there is an inverse relationship between a plurality of active region widths of the semiconductor components and the wall widths.

16 . The semiconductor device according to claim 15 , wherein there is an inverse relationship between the wall widths and the wall heights.

17 . The semiconductor device according to claim 15 , wherein there is a positive relationship between the wall widths and the wall heights.

18 . The semiconductor device according to claim 15 , wherein a plurality of active region widths of the semiconductor components are different.

19 . The semiconductor device according to claim 15 , wherein total widths of the semiconductor components are identical.

20 . The semiconductor device according to claim 15 , wherein the active region widths of the semiconductor components are different.