IP Library Granted Patent US 12701810
Granted Patent B2
US 12701810 · App. 18/334,547 · Granted Aug 4, 2026

Semiconductor device and method of manufacturing semiconductor device

Inventor: Akira Nakajima (Yokkaichi Mie, JP)
Assignee: Kioxia Corporation
H10F39/811H10F39/809H10W72/019H10W72/01935H10W72/01938H10W72/01951H10W72/071H10W72/921H10W72/923H10W72/941H10W72/952H10W72/953H10W80/754H10W90/792
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Quick Facts
Patent No.
US 12701810
App. No.
18/334,547
Filed
Jun 14, 2023
Granted
Aug 4, 2026
Kind
B2
Art Unit
2898
USPC
257/751
Abstract

In a semiconductor device according to an embodiment, a first connection wiring layer and a second connection wiring layer are bonded such that a first surface and a second surface face each other and a first electrode and a second electrode are in contact with each other, wherein the first electrode includes a first barrier metal film provided in a first trench and containing Ti, and a first conductive film provided in the first trench via the first barrier metal film and containing polycrystalline Cu, the second electrode includes a second barrier metal film provided in a second trench and containing Ti, and a second conductive film provided in the second trench via the second barrier metal film and containing polycrystalline Cu, and Ti and O are present on a bonding surface between the first electrode and the second electrode.

Claims (20)

1 . A semiconductor device comprising:

a first connection wiring layer configured to comprise a first insulating layer including a first trench formed on a first surface, and a first electrode provided in the first trench; and

a second connection wiring layer configured to comprise a second insulating layer including a second trench formed on a second surface facing the first surface, and a second electrode provided in the second trench,

wherein the first connection wiring layer and the second connection wiring layer are bonded such that the first surface and the second surface face each other and the first electrode and the second electrode are in contact with each other,

wherein the first electrode includes a first barrier metal film provided in the first trench and containing Ti, and a first conductive film provided in the first trench via the first barrier metal film and containing polycrystalline Cu,

wherein the second electrode includes a second barrier metal film provided in the second trench and containing Ti, and a second conductive film provided in the second trench via the second barrier metal film and containing polycrystalline Cu,

wherein Ti and O are present on a bonding surface between the first electrode and the second electrode,

wherein Ti and O are present throughout on the bonding surface,

wherein the second connection wiring layer of a second substrate includes a first silicon oxide layer, a SiCN film, and a second silicon oxide layer which are stacked in order from a device layer of the second substrate,

wherein the first silicon oxide layer, the SiCN film, and the second silicon oxide layer constitute a second insulating layer,

wherein wires are connected to devices provided inside the device layer are provided inside the first silicon oxide layer,

wherein the first conductive film is a polycrystalline Cu film, and the first barrier metal film is a Ti film, and

wherein a film containing TiO 2 is formed on the bonding surface between the first electrode and the second electrode.

2 . The semiconductor device according to claim 1 , wherein the film containing TiO2 is formed on the bonding surface between the first electrode and the second electrode by the heat treatment.

3 . The semiconductor device according to claim 1 , wherein the first barrier metal film is a single-layer Ti film or a film in which multiple Ti films are laminated.

4 . The semiconductor device according to claim 1 , wherein the second barrier metal film is a single-layer Ti film or a film in which multiple Ti films are laminated.

5 . The semiconductor device according to claim 3 , wherein the second barrier metal film is a single-layer Ti film or a film in which multiple Ti films are laminated.

6 . The semiconductor device according to claim 1 , wherein the first conductive film is adjacent to the first barrier metal film.

7 . The semiconductor device according to claim 1 , wherein the second conductive film is adjacent to the second barrier metal film.

8 . The semiconductor device according to claim 6 , wherein the second conductive film is adjacent to the second barrier metal film.