IP Library Granted Patent US 12701869
Granted Patent B2
US 12701869 · App. 18/468,134 · Granted Aug 4, 2026

Display panel and method of manufacturing the same

Inventors: Wonje Jo (Yongin-si, KR); Che Ho Lee (Yongin-si, KR); Soyeon Jeong (Yongin-si, KR); Jungsu Kim (Yongin-si, KR); Young Seo Choi (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K59/122H10K59/1201H10K59/873
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Quick Facts
Patent No.
US 12701869
App. No.
18/468,134
Granted
Aug 4, 2026
Kind
B2
Abstract

A method of manufacturing a display panel includes providing a work substrate including a first electrode and a pixel-defining layer including an opening exposing at least a part of the first electrode, forming a spacer on the pixel-defining layer, forming a light-emitting layer on the first electrode by providing a deposition material to a mask including a deposition opening corresponding to the opening, removing the mask, and compressing particles remaining on the spacer by a compression tool.

Claims (56)

1 . A method of manufacturing a display panel, the method comprising:

providing a work substrate including a first electrode and a pixel-defining layer including an opening exposing at least a portion of the first electrode;

forming a spacer on the pixel-defining layer;

forming a light-emitting layer on the first electrode by providing a deposition material to a mask including a deposition opening corresponding to the opening;

removing the mask; and

compressing particles remaining on the spacer by a compression tool,

wherein each of the particles and the deposition material include a same material.

2 . The method of claim 1 , wherein the spacer comprises polyimide.

3 . The method of claim 1 , further comprising:

forming a second electrode covering the light-emitting layer and the pixel-defining layer.

4 . The method of claim 3 , further comprising:

forming a cover layer covering the second electrode.

5 . The method of claim 4 , further comprising:

forming a first inorganic layer covering the cover layer;

forming an organic layer covering the first inorganic layer; and

forming a second inorganic layer covering the organic layer,

wherein an upper surface of the first inorganic layer overlapping the particles in a plan view is flat.

6 . The method of claim 4 , wherein the compression tool and the mask have a same shape in a plan view.

7 . The method of claim 1 , wherein the compression tool compresses particles at a temperature in a range of about 30° C. to about 100° C.

8 . The method of claim 1 , wherein in the compressing of the particles, the particles are compressed onto an upper surface of the spacer.

9 . The method of claim 1 , wherein in the compressing of the particles, at least a part of each of the particles is inserted from an upper surface of the spacer into the spacer.

10 . The method of claim 1 , wherein in the compressing of the particles, at least some of the particles are adhered to the compression tool and removed from the spacer.

11 . The method of claim 10 , wherein

the compression tool comprises a compression part and a coating layer disposed under the compression part, and

the at least some of the particles are adhered to the coating layer and removed from the spacer.

12 . The method of claim 1 , wherein a sum of a thickness of the pixel-defining layer and a thickness of the spacer after the compressing of the particles is less than the sum of the thickness of the pixel-defining layer and the thickness of the spacer before the compressing of the particles in a thickness direction of the work substrate.

13 . A display panel comprising:

a circuit element layer including a transistor and disposed on a base layer;

a display element layer including:

first electrodes electrically connected to the transistor;

a second electrode disposed in common on the first electrodes;

light-emitting layers, each disposed between a corresponding one of the first electrodes and the second electrode;

a pixel-defining layer including openings exposing at least a portion of each of the first electrodes and covered by the second electrode;

a spacer disposed between the pixel-defining layer and the second electrode, the spacer being disposed on an upper surface of the pixel-defining layer in a non-light-emitting region; and

a plurality of discrete particles disposed between the spacer and the second electrode; and

an encapsulation layer disposed on the display element layer,

wherein each of the plurality of discrete particles and the light-emitting layers include a same material.

14 . The display panel of claim 13 , wherein the encapsulation layer comprises:

a first inorganic layer disposed on the second electrode;

a second inorganic layer disposed on the first inorganic layer; and

an organic layer disposed between the first inorganic layer and the second inorganic layer.

15 . The display panel of claim 14 , wherein the display element layer further includes a cover layer disposed between the second electrode and the first inorganic layer.

16 . A display panel comprising:

a pixel including a transistor, a first electrode electrically connected to the transistor, a second electrode disposed on the first electrode, and a light-emitting layer disposed between the first electrode and the second electrode;

a pixel-defining layer including an opening exposing at least a part of the first electrode and covered by the second electrode;

a spacer disposed between the pixel-defining layer and the second electrode, the spacer being disposed on an upper surface of the pixel-defining layer in a non-light-emitting region;

a plurality of discrete particles disposed between the spacer and the second electrode; and

an encapsulation layer including:

a first inorganic layer disposed on the second electrode;

a second inorganic layer disposed on the first inorganic layer; and

an organic layer disposed between the first inorganic layer and the second inorganic layer,

wherein an upper surface of the first inorganic layer overlapping the plurality of discrete particles in a plan view is flat.

17 . The display panel of claim 16 , wherein each of the plurality of discrete particles and the light-emitting layer include a same material.

18 . The display panel of claim 16 , further comprising:

a cover layer disposed between the second electrode and the first inorganic layer.

19 . The display panel of claim 16 , wherein the spacer comprises polyimide.