Display apparatus for preventing non-uniformity of luminance

1 . A display apparatus comprising:

a display panel having a display area configured to display an image and a non-display area around the display area;

a low potential voltage line in the non-display area;

a high potential voltage line including a first high potential voltage line between the display area and the low potential voltage line and a second high potential voltage line disposed spaced apart from the first high potential voltage line, the low potential voltage line being disposed between the first high potential voltage line and the second high potential voltage line;

a connection line for connecting electrically the first high potential voltage line and the second high potential voltage line; and

a cover layer on the connection line to cover the connection line.

2 . The display apparatus of claim 1 , wherein the display panel includes:

a thin film transistor, the thin film transistor comprising:

a semiconductor pattern on a substrate in the display area,

a gate insulating layer on the semiconductor pattern,

a gate electrode on the gate insulating layer,

an interlayer insulating layer on the gate electrode, and

a source electrode and a drain electrode on the interlayer insulating layer; and

a light emitting device over the thin film transistor.

3 . The display apparatus of claim 2 , wherein the high potential voltage line includes a first metal layer on the interlayer insulating layer.

4 . The display apparatus of claim 2 , wherein the high potential voltage line includes a first metal layer on the interlayer insulating layer and the low potential voltage line includes a second metal layer on the interlayer insulating layer.

5 . The display apparatus of claim 4 , further comprising:

an insulating layer over the thin film transistor; and

a connection layer on the insulating layer, the connection layer connecting the drain electrode of the thin film transistor to the light emitting device.

6 . The display apparatus of claim 5 , wherein the high potential voltage line further includes a third metal layer on the insulating layer and the low potential voltage line further includes a fourth metal layer on the insulating layer.

7 . The display apparatus of claim 6 , wherein the first metal layer is electrically connected to the third metal layer and the second metal layer is electrically connected to the fourth metal layer.

8 . The display apparatus of claim 2 , further comprising an insulating layer formed on the high potential voltage line and the low potential voltage line.

9 . The display apparatus of claim 8 , wherein the insulating layer is formed in an entire area of the substrate.

10 . The display apparatus of claim 8 , wherein the insulating layer comprises an inorganic insulating material.

11 . The display apparatus of claim 1 , wherein the cover layer is formed only on a upper surface and side surfaces of the connection line.

12 . A display apparatus, comprising:

a display panel having a display area configured to display an image and a pad area around the display area;

a low potential voltage line in the pad area;

a high potential voltage line including a first high potential voltage line between the display area and the low potential voltage line in the pad area and a second high potential voltage line disposed spaced apart from the first high potential voltage line, the low potential voltage line being disposed between the first high potential voltage line and the second high potential voltage line;

a connection line for connecting electrically the first high potential voltage line and the second high potential voltage line; and

a cover layer on the connection line to cover the connection line.

13 . The display apparatus of claim 12 , wherein the pad area is disposed outside of the display area in a lower end portion of the display area.