Fin structure with reduced defects and manufacturing method thereof

1 . A method, comprising:

implanting a first dopant and carbon in a first portion of a substrate of a semiconductor device;

implanting a second dopant and carbon in a second portion of the substrate;

depositing a first silicon-based layer on the first portion of the substrate and the second portion of the substrate;

etching a recessed portion extending through the first silicon-based layer,

wherein the recessed portion extends into the first portion of the substrate;

depositing a seed layer in the recessed portion,

wherein the seed layer lines side surfaces and a bottom surface of the recessed portion;

depositing a second silicon-based layer within the recessed portion,

wherein the second silicon-based layer is deposited on the seed layer;

forming a plurality of fin structures based on etching one or more portions of the first silicon-based layer, the first portion of the substrate, the second silicon-based layer, the seed layer, and the second portion of the substrate; and

forming a set of isolation structures disposed between fin structures of the plurality of fin structures,

wherein each fin structure of a first subset of the plurality of fin structures includes a first diffusion region between part of the first portion of the substrate and part of the seed layer,

wherein the first diffusion region includes carbon diffused into silicon and has a top surface at a first height above the substrate,

wherein each fin structure of a second subset of the plurality of fin structures includes a second diffusion region between part of the second portion of the substrate and part of the first silicon-based layer,

wherein the second diffusion region includes carbon diffused into silicon and has a top surface at a second height above the substrate,

wherein the first height is less than or equal to a third height of an isolation structure of the set of isolation structures and the second height is greater than or equal to the third height,

wherein a bottom surface of the second diffusion region is at a fourth height above the substrate, and

wherein the fourth height is greater than or equal to the third height.

2 . The method of claim 1 , wherein the first subset of the plurality of fin structures comprises p-type fin structures, and

wherein the first portion of the substrate comprises silicon material doped with an n-type dopant.

3 . The method of claim 1 , wherein the recessed portion extends into the first portion of the substrate by an amount in a range of 5 nanometers to 10 nanometers.

4 . The method of claim 1 , wherein the second silicon-based layer comprises a carbon-free silicon-based material.

5 . A method, comprising:

implanting a first dopant and carbon in a first portion of a substrate of a semiconductor device;

implanting a second dopant and carbon in a second portion of the substrate;

depositing a first silicon-based layer on the first portion of the substrate and the second portion of the substrate;

etching a recessed portion extending through the first silicon-based layer,

wherein the recessed portion extends into the first portion of the substrate;

depositing a seed layer in the recessed portion,

wherein the seed layer lines side surfaces and a bottom surface of the recessed portion;

depositing a second silicon-based layer within the recessed portion,

wherein the second silicon-based layer is deposited on the seed layer;

etching the second silicon-based layer, the seed layer, the first portion of the substrate, the first silicon-based layer, and the second portion of the substrate to form a plurality of fin structures; and

forming a set of isolation structures disposed between fin structures of the plurality of fin structures,

wherein each fin structure of a first subset of the plurality of fin structures includes a first diffusion region between part of the first portion of the substrate and part of the seed layer,

wherein the first diffusion region includes carbon diffused into silicon and has a top surface at a first height above the substrate,

wherein each fin structure of a second subset of the plurality of fin structures includes a second diffusion region between part of the second portion of the substrate and part of the first silicon-based layer,

wherein the second diffusion region includes carbon diffused into silicon and has a top surface at a second height above the substrate,

wherein the first height is less than or equal to a third height of an isolation structure of the set of isolation structures and the second height is greater than or equal to the third height,

wherein a bottom surface of the second diffusion region is at a fourth height above the substrate, and

wherein the fourth height is greater than or equal to the third height.

6 . The method of claim 5 , wherein the first dopant comprises an n-type dopant.

7 . The method of claim 5 , wherein the recessed portion extends into the first portion of the substrate with a height, relative to a top surface of the substrate, in a range of 5 nanometers to 10 nanometers.

8 . The method of claim 5 , further comprising:

baking the semiconductor device after co-implanting the first dopant and the carbon in the first portion of the substrate and before depositing the first silicon-based layer.

9 . The method of claim 5 , wherein the recessed portion has a height, relative to a top surface of the substrate, in a range of 120% to 140% of a height of a sum of a height of the first silicon-based layer and a height of the first diffusion region.

10 . The method of claim 5 , wherein the seed layer comprises one or more of:

pure silicon,

lightly doped silicon, or

gradient silicon.

11 . A method, comprising:

forming a first set of fin structures on a substrate of a semiconductor device, a first fin structure of the first set of fin structures comprising:

a first fin portion including an n-type dopant and carbon co-implanted in a first silicon-based material

a second fin portion, disposed above the first fin portion, including a first carbon-free silicon-based material, and

a third fin portion, disposed between the first fin portion and the second fin portion, including a diffusion region that includes carbon diffused into silicon,

wherein a top surface of the third fin portion is at a first height above the substrate, and

wherein the first height is less than or equal to a second height of a trench structure disposed between fin structures of the first set of fin structures; and

forming a second set of fin structures on the substrate, a second fin structure of the second set of fin structures comprising:

a fourth fin portion including a p-type dopant and carbon co-implanted in a second silicon-based material,

a fifth fin portion, disposed above the fourth fin portion, including a second carbon-free silicon-based material, and

a sixth fin portion, disposed between the fourth fin portion and the fifth fin portion, including a diffusion region that includes carbon diffused into silicon,

wherein a bottom surface of the sixth fin portion is at a third height above the substrate, and

wherein the third height is greater than or equal to a fourth height of a trench structure disposed between fin structures of the second set of fin structures.

12 . The method of claim 11 , wherein one or more of the first carbon-free silicon-based material or the second carbon-free silicon-based material has a concentration of carbon that is less than 0.1%.

13 . The method of claim 11 ,

wherein the second height is equal to the fourth height.

14 . The method of claim 11 , wherein the third fin portion has a concentration of carbon in a range of 0.1% to 1.5%.

15 . The method of claim 13 , wherein the diffusion region of the sixth fin portion comprises one or more of:

a concentration of carbon in a range of 0.1% to 1.5%, or

a concentration of boron in a range of 0% to 0.5%.

16 . The method of claim 1 , wherein the first silicon-based layer reacts with the carbon in the first portion of the substrate to form the first diffusion region on the first portion of the substrate.

17 . The method of claim 1 , wherein the second silicon-based layer reacts with the carbon in the first portion of the substrate to form the first diffusion region on the first portion of the substrate.

18 . The method of claim 5 , further comprising:

baking or annealing the semiconductor device after depositing the second silicon-based layer, wherein the second silicon-based layer reacts with the carbon in the first portion of the substrate, during the baking or the annealing, to form the first diffusion region on the first portion of the substrate.

19 . The method of claim 1 , wherein the first silicon-based layer reacts with the carbon in the second portion of the substrate to form the second diffusion region on the second portion of the substrate.

20 . The method of claim 5 , wherein the first silicon-based layer reacts with the carbon in the second portion of the substrate to form the second diffusion region on the second portion of the substrate.