IP Library Granted Patent US 12701937
Granted Patent B2
US 12701937 · App. 18/315,322 · Granted Aug 4, 2026

Method of manufacturing semiconductor device

Inventors: Eunhyea Ko (Suwon-si, KR); Daihyun Kim (Suwon-si, KR); Thanh Cuong Nguyen (Suwon-si, KR); Soyoung Lee (Suwon-si, KR); Jihyun Lee (Suwon-si, KR); Hoon Han (Suwon-si, KR); Byungkeun Hwang (Suwon-si, KR); Hiroyuki Uchiuzou (Tokyo, JP); Kiyoshi Murata (Tokyo, JP); Tomoharu Yoshino (Tokyo, JP); Younjoung Cho (Suwon-si, KR)
Assignees: Samsung Electronics Co., Ltd.; Adeka Corporation
H10P14/687H10P14/6508H10P14/6514H10P50/283H10P50/287
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Quick Facts
Patent No.
US 12701937
App. No.
18/315,322
Granted
Aug 4, 2026
Kind
B2
Abstract

A method of manufacturing a semiconductor device is provided. The method includes providing a first layer having a first surface and a second layer having a second surface orthogonal to the first surface in a vertical direction, forming an inhibitor layer conformally on the first surface and the second surface, exposing the second surface by selectively removing the inhibitor layer on the second surface among the first surface and the second surface, the exposing of the second surface may include selectively removing an edge portion of the inhibitor layer on the first surface, the edge portion contacting the second surface, and forming an interest layer on the exposed second surface.

Claims (45)

1 . A method of manufacturing a semiconductor device, the method comprising:

providing a first layer having a first surface and a second layer having a second surface orthogonal to the first surface in a vertical direction;

forming an inhibitor layer conformally on the first surface and the second surface;

exposing the second surface by selectively removing the inhibitor layer on the second surface among the first surface and the second surface, the exposing of the second surface including selectively removing an edge portion of the inhibitor layer on the first surface, the edge portion contacting the second surface; and

forming an interest layer on the second surface having been exposed.

2 . The method of claim 1 , wherein the inhibitor layer comprises a benzene ring.

3 . The method of claim 2 , wherein the inhibitor layer comprises at least one of 4-trifluoromethyl benzaldehyde (4-TFBA), 3,5-bis (trifluoromethyl) aniline), benzaldehyde, 4-trifluoromethyl aniline, aniline, benzene, 3-trifluoromethyl benzaldehyde, 4-trifluoromethyl acetophenone, 3,5-bis(trifluoromethyl) acetophenone, 3-trifluoromethyl acetophenone, 3-trifluoromethyl benzonitrile, 4-fluorotoluene, 3-fluorophenylacetylene, 4-trifluoromethyl benzoyl chloride, or 4-methylthio aniline.

4 . The method of claim 1 , wherein the exposing the second surface comprises exposing an entirety of the second surface.

5 . The method of claim 1 , wherein the forming the interest layer on the second surface having been exposed comprises forming a second portion contacting the first surface and the second surface.

6 . The method of claim 1 , wherein the exposing the second surface by selectively removing the inhibitor layer on the second surface among the first surface and the second surface comprises

not removing a center portion of the inhibitor layer on the first surface, and

the center portion not contacting the second surface.

7 . The method of claim 1 , wherein the first layer comprises at least one of titanium nitride or titanium aluminum nitride.

8 . The method of claim 1 , wherein the second layer is configured to release a material comprising acid or hydrogen cations based on stimulation.

9 . The method of claim 1 , wherein the inhibitor layer is configured to decompose by a chemical reaction with a material comprising acid or hydrogen cations.

10 . The method of claim 1 , wherein the interest layer comprises at least one of tantalum nitride, aluminum oxide, hafnium oxide, silicon oxide, or niobium oxide.

11 . A method of manufacturing a semiconductor device, the method comprising:

performing a pretreatment process on a first surface of a first layer;

forming an inhibitor layer on the first surface and a second surface of a second layer, the first layer including a metal nitride and the second layer not including a metal nitride, the second layer includes an acid-precursor;

exposing the second surface by selectively removing the inhibitor layer on the second surface among the first surface and the second surface based on a heat treatment process releasing acid or hydrogen cations from the acid-precursor; and

forming an interest layer on the second surface having been exposed.

12 . The method of claim 11 , wherein the performing of the pretreatment process on the first surface of the first layer comprises at least one of treating the first surface with an HF aqueous solution, treating the first surface with H 2 plasma, or treating the first surface with NH 3 plasma.

13 . The method of claim 11 , wherein the inhibitor layer comprises a benzene ring.

14 . The method of claim 13 , wherein the inhibitor layer comprises at least one of 4-trifluoromethyl benzaldehyde (4-TFBA), 3,5-bis (trifluoromethyl) aniline), benzaldehyde, 4-trifluoromethyl aniline, aniline, benzene, 3-trifluoromethyl benzaldehyde, 4-trifluoromethyl acetophenone, 3,5-bis(trifluoromethyl) acetophenone, 3-trifluoromethyl acetophenone, 3-trifluoromethyl benzonitrile, 4-fluorotoluene, 3-fluorophenylacetylene, 4-trifluoromethyl benzoyl chloride, or 4-methylthio aniline.

15 . The method of claim 11 , wherein

the exposing the second surface comprises selectively removing a first portion of the inhibitor layer on the first surface, and

the first portion contacts the first surface and the second surface.

16 . The method of claim 11 , wherein the forming the interest layer on the second surface having been exposed comprises forming a second portion contacting the first surface and the second surface.

17 . The method of claim 11 , further comprising:

after forming the interest layer on the second surface having been exposed, removing the inhibitor layer on the first surface.

18 . A method of manufacturing a semiconductor device, the method comprising:

pretreating a first surface of a metal nitride layer with H 2 plasma;

forming a first inhibitor layer on the first surface;

forming a second inhibitor layer on a second surface of a gap-fill insulating layer orthogonal to the first surface in a vertical direction;

exposing the second surface and a first portion of the first surface by selectively removing the second inhibitor layer from among the first inhibitor layer and the second inhibitor layer through a heat treatment process; and

forming an interest layer on the second surface and the first portion of the first surface, and

wherein the first portion of the first surface comprises a portion, on which a portion of the second inhibitor layer contacting the first surface and the second surface is formed.

19 . The method of claim 18 , wherein

the gap-fill insulating layer is configured to release a material comprising acid or hydrogen cations based on the heat treatment process, and

the second inhibitor layer is configured to decompose by the material comprising the acid or the hydrogen cations.

20 . The method of claim 18 , further comprising:

after forming the interest layer on the second surface and on the first portion of the first surface,

exposing a second portion of the first surface by removing the first inhibitor layer through a wet etching process; and

etching the metal nitride layer of the second portion,

wherein the second portion comprises a region of the first surface excluding the first portion.