Wafer boat and plate for wafer boat
A wafer boat according to an aspect of the present invention includes: at least one plate on which a plurality of wafers are loaded; and a plurality of pin pairs that are arranged along a first direction from the at least one plate and respectively support corresponding wafers among the plurality of wafers.
1 . A wafer boat, comprising:
at least one plate on which a plurality of wafers are loaded; and
a plurality of pin pairs arranged in the at least one plate along a first direction and each of the plurality of pin pairs supporting a corresponding wafer among the plurality of wafers, wherein
pins of any one pin pair of the plurality of pin pairs are located to have a separation distance (DT) satisfying the following equation:
DT
=
da
2
+
db
2
,
(
Lw
(
1
2
+
tan
θ
t
)
≤
da
<
Lw
,
Lw
(
1
2
-
tan
θ
t
)
≤
db
<
Lw
)
,
where, da is a distance from a vertex closest to a lower edge of the plate among the vertexes of the corresponding wafer to any one of the pins, db is a distance from the vertex to the other pin, Lw is a length of one side of the corresponding wafer, and Ot is an angle of inclination of the corresponding wafer.
2 . The wafer boat of claim 1 , wherein the first direction is a direction in which the plurality of wafers are arranged, and a direction of a line connecting pins of any one pin pair of the plurality of pin pairs forms a predetermined angle with the first direction.
3 . The wafer boat of claim 2 , wherein the pins of any one pin pair are respectively located at different levels with respect to one edge of the at least one plate.
4 . The wafer boat of claim 2 , wherein the pins of any one pin pair are respectively in contact with adjacent edges among a plurality of edges of the corresponding wafer.
5 . The wafer boat of claim 1 , wherein the pins of any one pin pair of the plurality of pin pairs are respectively in point contact or line contact with the corresponding wafer.
6 . The wafer boat of claim 1 , wherein the at least one plate comprises a plurality of openings configured to receive the corresponding wafer of the plurality of wafers.
7 . The wafer boat of claim 6 , wherein the pins of any one pin pair of the plurality of pin pairs are disposed parallel to a circumference of a corresponding opening among the plurality of openings.
8 . The wafer boat of claim 1 , wherein when the at least one plate is configured in a plurality, at least some of the plurality of pin pairs respectively arranged on adjacent plates do not overlap with each other.
9 . A plate on which a plurality of wafers are loaded, the plate comprising:
a plurality of pin pairs arranged along a direction in which the plurality of wafers are arranged in the plate and each of the plurality of pin pairs supporting a corresponding wafer among the plurality of wafers in a direction different from the direction in which the plurality of wafers are arranged, wherein
pins of any one pin pair of the plurality of pin pairs are located to have a separation distance (DT) satisfying the following equation:
DT
=
da
2
+
db
2
·
(
Lw
(
1
2
+
tan
θ
t
)
≤
da
<
Lw
,
Lw
(
1
2
+
tan
θ
t
)
≤
db
<
Lw
)
,
[
Equation
]
where, da is a distance from a vertex closest to a lower edge of the plate among the vertexes of the corresponding wafer to any one of the pins, db is a distance from the vertex to the other pin, Lw is a length of one side of the corresponding wafer, and Ot is an angle of inclination of the corresponding wafer.
10 . The plate of claim 9 , wherein a direction of a line connecting pins of any one pin pair of the plurality of pin pairs forms a predetermined angle with the direction in which the plurality of wafers are arranged and is perpendicular to the different direction.
11 . The plate of claim 10 , wherein the pins of any one pin pair are respectively located at different levels with respect to one edge of the plate.
12 . The plate of claim 10 , wherein the pins of any one pin pair are respectively in contact with adjacent edges among the edges of the corresponding wafer.
13 . The plate of claim 9 , wherein each pin of any one pin pair of the plurality of pin pairs is in point contact or line contact with the corresponding wafer.
14 . The plate of claim 9 , further comprising:
a plurality of openings corresponding to the plurality of wafers.
15 . The plate of claim 14 , wherein the pins of any one pin pair of the plurality of pin pairs are disposed parallel to a circumference of a corresponding opening among the plurality of openings.