Interconnection structure and method for forming the same

1 . A method for forming an interconnection structure, comprising:

depositing a dielectric layer over a first interconnect layer, wherein the first interconnect layer comprises a first metallization layer;

forming a via opening in the dielectric layer, wherein forming the via opening comprises:

etching a recess in the dielectric layer above the first metallization layer;

etching a first lateral recess in the dielectric layer at a sidewall of the recess; and

after etching the first lateral recess, etching the recess downward to expose the first metallization layer; and

forming a conductive via in the via opening.

2 . The method of claim 1 , wherein etching the first lateral recess is performed such that the first metallization layer is covered by the dielectric layer.

3 . The method of claim 1 , wherein etching the first lateral recess is performed such that the first lateral recess extends laterally beyond a top width of the recess.

4 . The method of claim 1 , wherein etching the recess in the dielectric layer is performed with a first vertical-to-lateral etch rate ratio, and etching the first lateral recess in the dielectric layer is performed with a second vertical-to-lateral etch rate ratio less than the first vertical-to-lateral etch rate ratio.

5 . The method of claim 1 , wherein forming the via opening further comprises:

after etching the first lateral recess, etching recess downward to a level higher than a top surface of the first metallization layer; and

etching a second lateral recess in the dielectric layer at the sidewall of the recess after etching recess downward to the level.

6 . The method of claim 5 , wherein the second lateral recess is lower than the first lateral recess.

7 . The method of claim 5 , wherein etching the second lateral recess is performed such that the first lateral recess is further laterally deepened.

8 . The method of claim 5 , wherein etching the second lateral recess is performed such that a lateral dimension of the first lateral recess is greater than a lateral dimension of the second lateral recess.

9 . The method of claim 1 , wherein forming the conductive via comprises:

depositing a conductive material into the recess and the first lateral recess; and

removing a portion of the conductive material external to the recess.

10 . The method of claim 1 , further comprising:

forming a second interconnect layer, wherein the second interconnect layer comprises a second metallization layer over the conductive via.

11 . A method for forming an interconnection structure, comprising:

depositing a dielectric layer over a first interconnect layer comprising a first metallization layer;

forming a hard mask layer over the dielectric layer;

patterning the hard mask layer to form an opening exposing the dielectric layer;

etching a via opening in the dielectric layer using the hard mask layer as an etch mask, comprising:

etching a recess in the dielectric layer above the first metallization layer;

etching a first lateral recess in the dielectric layer at a sidewall of the recess;

after etching the first lateral recess, etching the recess downward to a level higher than a top surface of the first metallization layer;

after etching the recess downward to the level, etching a second lateral recess in the dielectric layer at the sidewall of the recess; and

after etching the second lateral recess, etching the recess downward to expose the first metallization layer, wherein exposing the first metallization layer is performed after etching the first lateral recess;

removing the hard mask layer; and

forming a conductive via in the via opening.

12 . The method of claim 11 , wherein etching the first lateral recess is performed such that the first metallization layer remains covered by the dielectric layer.

13 . The method of claim 11 , wherein etching the first lateral recess is performed such that the first lateral recess extends laterally beyond a top width of the recess.

14 . The method of claim 11 , wherein the hard mask layer is removed by a wet clean process after etching the via opening.

15 . The method of claim 11 , wherein forming the conductive via comprises:

depositing a conductive material into the recess, the first lateral recess and the second lateral recess; and

removing a portion of the conductive material external to the recess.

16 . A method for forming an interconnection structure, comprising:

depositing a dielectric layer over a first interconnect layer, wherein the first interconnect layer comprises a first metallization layer;

forming a patterned hard mask layer over the dielectric layer, wherein the patterned hard mask layer comprises an opening exposing the dielectric layer;

forming a via opening in the dielectric layer using the patterned hard mask layer as an etch mask, wherein forming the via opening comprises:

performing a first dry etching process to form a recess in the dielectric layer above the first metallization layer;

in-situ in a same plasma etching apparatus immediately after the first dry etching process, performing a second dry etching process to form a first lateral recess in the dielectric layer at a sidewall of the recess; and

after forming the first lateral recess, etching the recess downward to expose the first metallization layer; and

forming a conductive via in the via opening.

17 . The method of claim 16 , wherein the plasma etching apparatus is selected from a reactive ion etcher (RIE) and an inductively coupled plasma (ICP) etcher.

18 . The method of claim 16 , wherein:

the first dry etching process comprises an anisotropic dry etching process performed with substrate bias; and

the second dry etching process comprises an isotropic dry etching process performed without substrate bias.

19 . The method of claim 16 , wherein the first lateral recess is localized to a lower region of a sidewall of the recess such that an upper region of the sidewall of the recess is free of the first lateral recess.

20 . The method of claim 19 , wherein the first lateral recess laterally encircles the recess to have an annular shape around the recess.