IP Library Granted Patent US 12701985
Granted Patent B2
US 12701985 · App. 18/323,006 · Granted Aug 4, 2026

Semiconductor device and method for fabricating the same

Inventors: Jee Woong Kim (Suwon-si, KR); Jin Kyu Kim (Suwon-si, KR); Ho Jun Kim (Suwon-si, KR); Jae Hyun Ahn (Suwon-si, KR); So Ra You (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H10W20/427H10D30/60H10D64/251H10W20/20
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Quick Facts
Patent No.
US 12701985
App. No.
18/323,006
Granted
Aug 4, 2026
Kind
B2
Abstract

A semiconductor device having simplicity in design and improved performance and methods for fabricating the same are provided. The semiconductor device includes a substrate including a frontside and a backside opposite the frontside, an electronic device on the frontside of the substrate, an interlayer insulating layer covering the electronic device, a frontside wiring structure on the interlayer insulating layer, a backside wiring structure on the backside of the substrate, and at least one unit chain connecting the electronic device with the backside wiring structure, the unit chain including a through plug passing through the substrate, a connection contact on the interlayer insulating layer, a first chain plug passing through the interlayer insulating layer to connect the through plug with the connection contact, and a second chain plug passing through the interlayer insulating layer to be connected to the through plug.

Claims (69)

1 . A semiconductor device comprising:

a substrate including a frontside and a backside opposite to the frontside;

an electronic device on the frontside of the substrate;

an interlayer insulating layer covering the electronic device;

a frontside wiring structure on the interlayer insulating layer;

a backside wiring structure on the backside of the substrate; and

at least one unit chain electrically connecting the electronic device with the backside wiring structure, each of the at least one unit chain including

a through plug passing through the substrate;

a connection contact on the interlayer insulating layer;

a first chain plug passing through the interlayer insulating layer to connect the through plug with the connection contact; and

a second chain plug spaced apart from the first chain plug, the second chain plug passing through the interlayer insulating layer to be connected to the through plug.

2 . The semiconductor device of claim 1 , wherein the through plug is not in contact with a wiring pattern of the backside wiring structure.

3 . The semiconductor device of claim 1 , wherein an upper surface of the connection contact is coplanar with an upper surface of the first chain plug and an upper surface of the second chain plug.

4 . The semiconductor device of claim 1 , wherein a lower surface of the connection contact is coplanar with the frontside of the substrate.

5 . The semiconductor device of claim 1 , wherein the electronic device includes:

an active pattern on the substrate;

a gate electrode crossing the active pattern on the active pattern; and

a source/drain pattern connected to the active pattern on a side of the gate electrode.

6 . The semiconductor device of claim 5 , further comprising a source/drain contact, which connects the second chain plug with the source/drain pattern, on the interlayer insulating layer,

wherein the connection contact and the source/drain contact are at a same level.

7 . The semiconductor device of claim 5 , further comprising a field insulating layer covering at least a portion of a side of the active pattern, on the frontside of the substrate,

wherein each of the first chain plug and the second chain plug passes through the field insulating layer to be connected to the through plug.

8 . The semiconductor device of claim 5 , wherein an upper surface of the connection contact, an upper surface of the first chain plug and an upper surface of the second chain plug are higher than an upper surface of the gate electrode.

9 . The semiconductor device of claim 1 , wherein a wiring pattern of the frontside wiring structure electrically connects the electronic device with the connection contact.

10 . The semiconductor device of claim 1 , wherein

the first chain plug and the second chain plug are arranged along a first direction,

the at least one unit chain includes a plurality of unit chains, and

at least a portion of the plurality of unit chains are arranged along the first direction to form a series of chain lines.

11 . The semiconductor device of claim 1 , wherein

the at least one unit chain includes a plurality of unit chains,

first portions of the plurality of unit chains are connected along a first direction to form a series of first chain lines,

second portions of the plurality of unit chains are connected along the first direction to form a series of second chain lines, and

the first chain lines and the second chain lines are each arranged along a second direction crossing the first direction.

12 . A semiconductor device comprising:

a substrate including a frontside and a backside opposite to the frontside;

a first electronic device on the frontside of the substrate;

an interlayer insulating layer covering the first electronic device;

a frontside wiring structure electrically connected to the first electronic device, on the interlayer insulating layer;

a backside wiring structure on the backside of the substrate;

a first through plug passing through the substrate to be connected to the backside wiring structure, the first through plug extending longer in a first direction;

a first vertical plug passing through the interlayer insulating layer to be connected to the first through plug, the first vertical plug having a first resistivity;

a first source/drain contact connecting the first electronic device with the first vertical plug, on the interlayer insulating layer;

a second vertical plug spaced apart from the first vertical plug in the first direction and passing through the interlayer insulating layer, the second vertical plug having a second resistivity greater than the first resistivity; and

a second through plug passing through the substrate to be connected with the second vertical plug, the second through plug extending longer in a second direction perpendicular to the first direction.

13 . The semiconductor device of claim 12 , further comprising:

a second electronic device on the frontside of the substrate;

a second source/drain contact connecting the second electronic device with the second vertical plug, on the interlayer insulating layer; and

the second through plug not being in contact with a wiring pattern of the backside wiring structure.

14 . The semiconductor device of claim 13 , wherein the second vertical plug includes

a first chain plug connecting the second source/drain contact with the second through plug, and

a second chain plug spaced apart from the second source/drain contact and the first chain plug.

15 . The semiconductor device of claim 12 , wherein the first vertical plug includes molybdenum (Mo) or copper (Cu).

16 . The semiconductor device of claim 12 , wherein the second vertical plug includes a metal nitride.

17 . A semiconductor device comprising:

a substrate including a frontside and a backside opposite to the frontside;

a first electronic device on the frontside of the substrate;

an interlayer insulating layer covering the first electronic device;

a frontside wiring structure on the interlayer insulating layer;

a backside wiring structure on the backside of the substrate extending longer in a first direction;

a first through plug passing through the substrate, the first through plug extending longer in the first direction;

a first vertical plug passing through the interlayer insulating layer to be connected to the first through plug, the first vertical plug having a first resistivity;

a source/drain contact connecting the first electronic device with the first vertical plug, on the interlayer insulating layer;

a second through plug spaced apart from the first through plug and passing through the substrate, the second through plug electrically connected to the backside wiring structure; and

a second vertical plug passing through the interlayer insulating layer to connect the frontside wiring structure with the second through plug, the second vertical plug having a second resistivity smaller than the first resistivity.

18 . The semiconductor device of claim 17 , wherein, in a plan view, an area of the second vertical plug is greater than an area of the first vertical plug.

19 . The semiconductor device of claim 17 , further comprising a landing contact connecting a wiring pattern of the frontside wiring structure with the second vertical plug,

wherein the source/drain contact and the landing contact are at a same level.

20 . The semiconductor device of claim 17 , further comprising a second electronic device on the frontside of the substrate,

wherein the second vertical plug surrounds the second electronic device in a plan view.