Film package

1 . A film package, comprising:

a film substrate having first and second surfaces opposing each other and first and second sides opposing each other, the first surface having a first region and a second region spaced apart in a first direction parallel to the first surface;

a plurality of wiring patterns including an input pattern, an interconnection pattern, and an output pattern, the input pattern extending from the first region to the first side of the film substrate, the output pattern extending from the second region to the second side of the film substrate, and the interconnection pattern extending from the first region to the second region;

a first semiconductor chip on the first region and electrically connected to the input pattern and the interconnection pattern;

at least one second semiconductor chip on the second region and electrically connected to the interconnection pattern and the output pattern;

a protective layer on the first surface covering at least a portion of the plurality of wiring patterns, the protective layer including a first opening exposing at least a portion of the first region, a second opening exposing at least a portion of the second region, and a third opening exposing at least a portion of the input pattern adjacent to the first side;

a first conductive film on the protective layer between the first opening and the third opening and extending in a second direction, the second direction intersecting the first direction; and

a second conductive film on the second surface and overlapping the first conductive film in a third direction, the third direction perpendicular to the first surface,

wherein the first semiconductor chip includes a source driving chip,

wherein the at least one second semiconductor chip includes a gate driving chip,

wherein, when viewed from the third direction, the first semiconductor chip has a first long side, a second long side, a first short side, and a second short side,

wherein the first long side and the second long side are opposite to each other in the first direction,

wherein the first short side and the second short side are opposite to each other in the second direction,

wherein the first long side faces the first side of the film substrate,

wherein the first conductive film is adjacent only to one or more of the first long side, the first short side, and the second short side among the first long side, the second long side, the first short side, and the second short side,

wherein, with respect to the first surface of the film substrate, an upper surface of the first conductive film is lower than an upper surface of the first semiconductor chip,

wherein the first conductive film is adjacent to the first long side and not adjacent to the second long side, and

wherein the first conductive film overlaps the input pattern in the third direction and exposes the protective layer in a section where the protective layer covers the interconnection pattern in the third direction.

2 . The film package of claim 1 , wherein the first conductive film has a bar shape extending in a longitudinal direction of the first semiconductor chip.

3 . The film package of claim 2 , wherein the first conductive film comprises a protrusion extending in the first direction such that the protrusion extends along an end surface of the first semiconductor chip.

4 . The film package of claim 1 , wherein the first conductive film has a width equal to or smaller than a width between the first opening and the third opening.

5 . The film package of claim 4 , wherein the width between the first opening and the third opening is smaller than a width between the first opening and the second opening.

6 . The film package of claim 1 , wherein the first conductive film has a planar area equal to or greater than that of the first semiconductor chip.

7 . The film package of claim 6 , wherein the first conductive film has a length greater than a length of the first semiconductor chip in the second direction, and a width equal to or smaller than a width of the first semiconductor chip in the first direction.

8 . The film package of claim 6 , wherein the first conductive film has a length equal to or smaller than a length of the first semiconductor chip in the second direction and a width greater than a width of the first semiconductor chip in the first direction.

9 . The film package of claim 1 , wherein

the first conductive film has a first edge adjacent to the first side, and the second conductive film has a second edge adjacent to the first side such that the first and second edges are on a same line in the third direction.

10 . The film package of claim 1 , wherein the first conductive film does not overlap with the protective layer between the first opening and the second opening.

11 . The film package of claim 1 , wherein the second conductive film has a planar area greater than that of the first conductive film.

12 . The film package of claim 1 , wherein the second conductive film overlaps the first semiconductor chip and the second semiconductor chip in the third direction.

13 . The film package of claim 1 , wherein the second conductive film is more closely adjacent to the first side of the film substrate than to the second side of the film substrate.

14 . The film package of claim 13 , wherein the protective layer further comprises a fourth opening exposing at least a portion of the output pattern adjacent to the second side.