IP Library Granted Patent US 12702005
Granted Patent B2
US 12702005 · App. 18/116,258 · Granted Aug 4, 2026

Semiconductor package with vapor chamber lid

Inventors: Chin-Lai Chen (Hsinchu City, TW); Wei-Che Huang (Hsinchu City, TW); Wen-Sung Hsu (Hsinchu City, TW); Chun-Yin Lin (Hsinchu City, TW); Li-Song Lin (Hsinchu City, TW); Tai-Yu Chen (Hsinchu City, TW)
Assignee: MEDIATEK INC.
H10W40/73H10W76/40H10W90/00H10W74/00H10W90/724H10W90/736
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Quick Facts
Patent No.
US 12702005
App. No.
18/116,258
Granted
Aug 4, 2026
Kind
B2
Abstract

A semiconductor package includes a substrate having a top surface and a bottom surface. A semiconductor device is mounted on the top surface of the substrate. The semiconductor device has an active front surface directly facing the substrate, and an opposite rear surface. A vapor chamber lid is in thermal contact with the rear surface of the semiconductor device. The vapor chamber lid includes an internal vacuum-sealed cavity that stores a working fluid, and wick structures for recirculating the working fluid within the internal vacuum-sealed cavity.

Claims (13)

1 . A semiconductor package, comprising:

a substrate having a top surface and a bottom surface;

a plurality of semiconductor devices mounted on the top surface of the substrate, wherein each of the plurality of semiconductor devices has an active front surface directly facing the substrate, and an opposite rear surface;

a vapor chamber lid in thermal contact with a rear surface of each of the plurality of semiconductor devices, wherein the vapor chamber lid comprises an internal vacuum-sealed cavity that stores a working fluid, and wick structures for recirculating the working fluid within the internal vacuum-sealed cavity, wherein the wick structures have a differing distribution density across the internal vacuum-sealed cavity to adapt to a power map of the plurality of semiconductor devices; and

a stiffener ring mounted on the top surface of the substrate, wherein the stiffener ring surrounds the semiconductor device, wherein the wick structures comprises differing distribution density across the vacuum-sealed cavity to adapt to a power map of the plurality of semiconductor devices, and wherein the wick structures has a lower density in a region directly over each of the plurality of semiconductor devices and a higher density in a region between the plurality of semiconductor devices.

2 . The semiconductor package according to claim 1 , wherein the wick structures are porous wick structures that generate a capillary pressure to recirculate the working fluid between an evaporator side and a condenser side of the vapor chamber lid.

3 . The semiconductor package according to claim 1 , wherein the vapor chamber lid is adhered to the stiffener ring.

4 . The semiconductor package according to claim 2 further comprising:

a heat sink mounted on the vapor chamber lid and in thermal contact with the condenser side of the vapor chamber lid.

5 . The semiconductor package according to claim 1 , wherein the vapor chamber lid comprises copper or aluminum.

6 . The semiconductor package according to claim 1 , wherein the working fluid comprises water.

7 . The semiconductor package according to claim 1 , wherein the wick structures comprise porous copper wicks.

8 . The semiconductor package according to claim 1 , wherein the semiconductor device is adjoined to the top surface of the substrate using a plurality of connecting elements.