Ultra low loss routing between glass cores
Embodiments disclosed herein include electronic devices. In an embodiment, an electronic device comprises a core, where the core comprises a first layer comprising glass, and a second layer comprising glass over the first layer. In an embodiment, a trace is between the first layer and the second layer. In an embodiment, routing layers are on the core.
1 . An electronic device, comprising:
a core, wherein the core comprises:
a first layer comprising glass;
a second layer comprising glass over the first layer;
an adhesive between the first layer and the second layer; and
a trace between the first layer and the second layer, wherein a thickness of the trace is substantially equal to a thickness of the adhesive; and
routing layers on the core.
2 . The electronic device of claim 1 , further comprising:
a first plane under the first layer, wherein the first plane is conductive; and
a second plane over the second layer, wherein the second plane is conductive.
3 . The electronic device of claim 2 , further comprising:
a via through the first layer and the second layer to connect the first plane to the second plane.
4 . The electronic device of claim 1 , further comprising:
a first via through the second layer and coupled to a first end of the trace;
a second via through the first layer and coupled to a second end of the trace.
5 . The electronic device of claim 1 , further comprising:
a first via through the second layer and coupled to a first end of the trace; and
a second via through the second layer and coupled to a second end of the trace.
6 . The electronic device of claim 5 , wherein the first via is coupled to a die, and the second via is coupled to a die side component.
7 . The electronic device of claim 1 , further comprising:
a first cavity in the first layer; and
a second cavity in the second layer above the first cavity, wherein the trace fills the first cavity and the second cavity.
8 . An electronic device, comprising:
a core, wherein the core comprises:
a first layer comprising glass;
an adhesive over the first layer;
a second layer comprising glass over the adhesive;
a first region at the center of the core, wherein the first region provides first traces for power delivery, wherein a thickness of the first traces is substantially equal to a thickness of the adhesive; and
a second region around the first region, wherein the second region provides second traces for signal routing.
9 . The electronic device of claim 8 , wherein the first traces and the second traces are between the first layer and the second layer.
10 . The electronic device of claim 8 , wherein a thickness of the first traces is greater than a thickness of the second traces.
11 . The electronic device of claim 10 , wherein the first traces extend into cavities in the first layer and the second layer.
12 . The electronic package of claim 10 , wherein the adhesive layer directly contacts a top surface of the second traces or a bottom surface of the second traces.
13 . The electronic device of claim 8 , wherein the first layer and the second layer each have a thickness that is approximately 100 μm or greater.
14 . The electronic device of claim 8 , wherein the second traces are configured to operate as a high-speed serial interconnect protocol.
15 . An electronic system, comprising:
a board;
a package substrate coupled to the board, wherein the package substrate comprises:
a core, wherein the core comprises:
a first layer comprising glass;
a second layer comprising glass over the first layer;
an adhesive between the first layer and the second layer; and
a trace between the first layer and the second layer, wherein a thickness of the trace is substantially equal to a thickness of the adhesive; and
routing layers over the core; and
a die coupled to the package substrate.