IP Library Granted Patent US 12702042
Granted Patent B2
US 12702042 · App. 17/696,162 · Granted Aug 4, 2026

Bumps comprising tin, cooper and bismuth for liquid metal socket interconnects

Inventors: Jiaqi Wu (Chandler, AZ); Xiao Lu (Chandler, AZ); Bohan Shan (Chandler, AZ); Valery Ouvarov-Bancalero (Scottsdale, AZ)
Assignee: Intel Corporation
H10W72/90B23K1/0008B23K35/26H10W72/20B23K2101/40H10W72/29
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12702042
App. No.
17/696,162
Granted
Aug 4, 2026
Kind
B2
Abstract

In one embodiment, an integrated circuit apparatus comprises a substrate that includes electrical contacts on a first side of the substrate to couple the substrate to an integrated circuit die, a passivation layer on a second side of the substrate opposite the first side, metal pads on the second side of the substrate and within openings defined by the passivation layer, and solder bumps on the metal pads. The solder bumps are a material that is resistant to Gallium-based liquid metal embrittlement.

Claims (53)

1 . An apparatus comprising:

a substrate comprising:

electrical contacts on a first side of the substrate to couple the substrate to an integrated circuit die;

a passivation layer on a second side of the substrate opposite the first side, the passivation layer defining a plurality of openings exposing the second side of the substrate;

metal pads on the second side of the substrate and within the openings defined by the passivation layer; and

solder bumps on the metal pads, the solder bumps comprising an intermetallic compound (IMC) resistant to Gallium-based liquid metal embrittlement, wherein the IMC comprises Tin and Copper and the solder bumps comprise between 20-40% Tin, 20-40% Copper, and 20-40% Bismuth.

2 . The apparatus of claim 1 , wherein the metal pads are positioned on the second side of the substrate such that trenches are defined between the metal pads and the passivation layer.

3 . The apparatus of claim 1 , further comprising an integrated circuit die coupled to the substrate on the first side of the substrate.

4 . The apparatus of claim 3 , further comprising:

a thermal interface material on the integrated circuit die; and

a cap coupled to the second side of the substrate, wherein the integrated circuit die and the thermal interface material are between the cap and the second side of the substrate.

5 . The apparatus of claim 1 , further comprising:

an interposer coupled to the substrate on the second side of the substrate, the interposer comprising:

a housing defining a set of holes;

an adhesive layer on a first side of the housing, the adhesive layer in contact with the passivation layer;

a barrier layer on a second side of the housing opposite the first side, the barrier layer enclosing the holes on the second side of the housing; and

Gallium-based liquid metal within the holes and in contact with the solder bumps.

6 . A system comprising:

a main board;

a socket coupled to the main board, the socket comprising a set of pins extending from the socket in a direction opposite the main board;

a package coupled to the socket, the package comprising:

a substrate;

an integrated circuit die on a first side of the substrate;

metal pads on a second side of the substrate opposite the first side;

solder bumps on the metal pads, the solder bumps comprising an intermetallic compound (IMC) resistant to Gallium-based liquid metal embrittlement, wherein the IMC comprises Tin and Copper and the solder bumps comprise between 20-40% Tin, 20-40% Copper, and 20-40% Bismuth; and

an interposer comprising a Gallium-based liquid metal in each of a set of reservoirs defined within the interposer, the Gallium-based liquid metal in each reservoir in contact with a respective solder bump;

wherein the pins of the socket are within the reservoirs of the interposer and in contact with the Gallium-based liquid metal.

7 . The system of claim 6 , wherein the substrate further comprises a passivation layer on the second side of the substrate, the passivation layer defining a plurality of trenches between the metal pads and the second side of the substrate.

8 . The system of claim 6 , wherein the package further comprises:

a thermal interface material on the integrated circuit die; and

a cap coupled to the second side of the substrate, wherein the integrated circuit die and the thermal interface material are between the cap and the second side of the substrate.

9 . An apparatus comprising:

a substrate comprising:

electrical contacts on a first side of the substrate to couple the substrate to an integrated circuit die;

a dielectric layer on a second side of the substrate opposite the first side, the dielectric layer defining a plurality of openings exposing the second side of the substrate;

metal pads on the second side of the substrate and within the openings defined by the dielectric layer; and

solder bumps on the metal pads, the solder bumps comprising an intermetallic compound (IMC) comprising Tin and Copper and further comprising Bismuth, wherein the solder bumps comprise between 20-40% Tin, 20-40% Copper, and 20-40% Bismuth.

10 . The apparatus of claim 9 , wherein the metal pads are positioned on the second side of the substrate such that trenches are defined between the metal pads and the dielectric layer.

11 . The apparatus of claim 9 , further comprising an integrated circuit die coupled to the substrate on the first side of the substrate.

12 . The apparatus of claim 9 , further comprising an interposer comprising a Gallium-based liquid metal in each of a set of reservoirs defined within the interposer, wherein each solder bump is in contact with the Gallium-based liquid metal in a reservoir of the interposer.

13 . A product made by a process comprising:

forming a substrate;

forming electrical contacts on a first side of the substrate;

forming a passivation layer on a second side of the substrate opposite the first side;

forming openings in the passivation layer exposing the second side of the substrate;

forming metal pads on the second side of the substrate within the openings in the passivation layer;

depositing solder paste on the metal pads, the solder paste comprising Tin, Copper, and Bismuth, wherein the solder paste comprises between 20-40% Tin, 20-40% Copper, and 20-40% Bismuth; and

exposing the solder paste to gas comprising Nitrogen and heat to form an intermetallic compound comprising Tin and Copper.

14 . The product of claim 13 , wherein exposing the solder paste to heat comprises exposing the solder paste to a temperature between 180-250° C.

15 . The product of claim 13 , wherein the process further comprises coupling an integrated circuit die to the first side of the substrate;

depositing a thermal interface material on the integrated circuit die; and

attaching a cap to the first side of the substrate such that the integrated circuit die and the thermal interface material are between the cap and the substrate;

wherein the solder paste is deposited after coupling the integrated circuit die to the substrate.