Method for producing an optoelectronic device comprising axial light-emitting diodes
A method of manufacturing an optoelectronic device including light-emitting diodes comprising forming three-dimensional semiconductor elements, extending along parallel axes, made of a III-V compound, with a polarity of the group-III element, the method further including, for each semiconductor element, forming an active area covering the semiconductor element and a stack of semiconductor layers covering the active area, the active area being formed by vapor deposition at low pressure and comprising quantum wells separated by barrier layers, each quantum well including a ternary alloy having at least one first group-III element, the group-V element, and a second group-III element, the ratio of the atomic flux of the group-III elements to the atomic flux of the group-V element is in the range from 1 to 1.8.
1 . Method of manufacturing an optoelectronic device comprising light-emitting diodes comprising three-dimensional semiconductor elements, comprising forming the three-dimensional semiconductor elements, extending along parallel axes, made of a III-V compound, with a polarity of the group-III element of the III-V compound, the method further comprising, for each semiconductor element, forming an active area covering the top of the semiconductor element and a stack of semiconductor layers covering the active area, the active area being formed by vapor deposition at a pressure lower than 66.6 mPa and comprising quantum wells separated by barrier layers, each quantum well comprising a ternary alloy comprising at least one first group-III element, the group-V element of the III-V compound, and a second group-III element, each barrier layer comprising the III-V compound, wherein, for the forming of each quantum well, the ratio of the atomic flux of the first and second group-III elements to the atomic flux of the group-V element is in the range from 1 to 1.8, the ratio of the atomic flux of the first group-III element to the atomic flux of the group-V element varies from 0.01 to 1, and the ratio of the atomic flux of the second group-III element to the atomic flux of the group-V element varies from 0.05 to 5, and wherein, for the forming of each barrier layer, the ratio of the atomic flux of the group-III element of the III-V compound to the atomic flux of the group-V element varies from 0.2 to 0.6.
2 . The method according to claim 1 , wherein the ratio of the atomic flux of the first and second group-III elements to the atomic flux of the group-V element of the III-V compound is in the range from 1 to 1.4, preferably from 1.1 to 1.3.
3 . The method according to claim 1 , wherein each quantum well is formed at a first temperature and each barrier layer is formed at a second temperature equal to the first temperature to within 50° C., preferably to within 30° C., more preferably to within 10° C.
4 . The method according to claim 1 , wherein the quantum wells and the barrier layers are formed by molecular beam epitaxy.
5 . The method according to claim 1 , wherein the first group-III element is identical to the group-III element of the III-V compound.
6 . The method according to claim 1 , wherein the three-dimensional semiconductor elements are formed by molecular beam epitaxy.
7 . The method according to claim 6 , wherein the ratio of the atomic flux of the group-III element of the III-V compound to the atomic flux of the group-V element of the III-V compound, for the forming of the three-dimensional semiconductor elements, is in the range from 0.35 to 2.
8 . The method according to claim 1 , wherein each active area comprises a base, sides, and a top, the base resting on the three-dimensional semiconductor element, the quantum wells comprising edges exposed on the sides, said stack covering the sides and the top.
9 . The method according to claim 8 , wherein each active area has the shape of a truncated pyramid of half apical angle β having its base resting on the three-dimensional semiconductor element, angle β being greater than 0°, preferably in the range from 5° to 80°, more preferably in the range from 20° to 30°.
10 . The method according to claim 1 , wherein at least a portion of each three-dimensional semiconductor element is a microwire, a nanowire, or a micrometer- or nanometer-range frustoconical element.
11 . The method according to claim 1 , wherein the three-dimensional semiconductor elements are n-type doped.
12 . The method according to claim 11 , wherein each stack comprises a semiconductor layer made of a p-type doped III-V compound.
13 . The method according to claim 1 , wherein the active areas are regions having most of the electromagnetic radiation supplied by the light-emitting diodes emitted therefrom.