Managing programming operation sequence in a memory sub-system

1 . A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to perform operations comprising:

performing a first sequence of programming operations on a first set of cells addressable by a first wordline of a memory array of the memory device;

identifying a number of programming operations performed on the first set of cells addressable by the first wordline of the memory device, wherein each programming operation of the number of programming operations is associated with the first sequence of programming operations;

upon determining that the number of programming operations performed on the first set of cells satisfies a threshold criterion, identifying a second wordline of the memory array, wherein a second physical location of the second wordline is in a predefined relationship with a first physical location of the first wordline; and

performing a second sequence of programming operations on a second set of cells addressable by the second wordline, wherein a first order of the first sequence of programming operations proceeds from a first end of the memory array to a second end of the memory array and a second order of the second sequence of programming operations proceeds from the second end of the memory array to the first end of the memory array.

2 . The system of claim 1 , wherein the processing device is to perform operations further comprising:

receiving a request to perform a third sequence of programming operations;

identifying a third wordline of the memory device, wherein a third physical location of the third wordline is in a predefined relationship with the first physical location of the first wordline and the second physical location of the second wordline; and

performing the third sequence of programming operations on a third set of cells addressable by the third wordline, wherein a third order of the third sequence of programming operations is different from at least one of: the first order of the first sequence of programming operations or the second order of the second sequence of programming operations.

3 . The system of claim 2 , wherein the first wordline and the second wordline of the memory device each reside on a first die of the memory device, and wherein the third wordline of the memory device resides on a second die of the memory device.

4 . The system of claim 1 , wherein the processing device is to perform operations further comprising:

identifying the second wordline of the memory device based on an index value of the first wordline, wherein the index value is indicative of a physical address of a wordline, and wherein the second wordline is adjacent to the first wordline.

5 . The system of claim 1 , wherein the first sequence of programming operations is a source to drain programming sequence.

6 . The system of claim 1 , wherein the second sequence of programming operations is a drain to source programming sequence.

7 . A method comprising:

performing a first sequence of programming operations on a first set of cells addressable by a first wordline of a memory array of a memory device;

identifying a number of programming operations performed on the first set of cells addressable by the first wordline of the memory device, wherein each programming operation of the number of programming operations is associated with the first sequence of programming operations;

upon determining that the number of programming operations performed on the first set of cells satisfies a threshold criterion, identifying a second wordline of the memory array, wherein a second physical location of the second wordline is in a predefined relationship with a first physical location of the first wordline; and

performing a second sequence of programming operations on a second set of cells addressable by the second wordline, wherein a first order of the first sequence of programming operations proceeds from a first end of the memory array to a second end of the memory array and a second order of the second sequence of programming operations proceeds from the second end of the memory array to the first end of the memory array.

8 . The method of claim 7 , further comprising:

receiving a request to perform a third sequence of programming operations;

identifying a third wordline of the memory device, wherein a third physical location of the third wordline is in a predefined relationship with the first physical location of the first wordline and the second physical location of the second wordline; and

performing the third sequence of programming operations on a third set of cells addressable by the third wordline, wherein a third order of the third sequence of programming operations is different from at least one of: the first order of the first sequence of programming operations or the second order of the second sequence of programming operations.

9 . The method of claim 8 , wherein the first wordline and the second wordline of the memory device each reside on a first die of the memory device, and wherein the third wordline of the memory device resides on a second die of the memory device.

10 . The method of claim 7 , further comprising:

identifying the second wordline based on an index value of the first wordline, wherein the index value is indicative of a physical address of a wordline, and wherein the second wordline is adjacent to the first wordline.

11 . The method of claim 7 , wherein the first sequence of programming operations is a source to drain programming sequence.

12 . The method of claim 7 , wherein the second sequence of programming operations is a drain to source programming sequence.

13 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

performing a first sequence of programming operations on a first set of cells addressable by a first wordline of a memory array of a memory device;

identifying a number of programming operations performed on the first set of cells addressable by the first wordline of the memory device, wherein each programming operation of the number of programming operations is associated with the first sequence of programming operations;

upon determining that the number of programming operations performed on the first set of cells satisfies a threshold criterion, identifying a second wordline of the memory array, wherein a second physical location of the second wordline is in a predefined relationship with a first physical location of the first wordline; and

performing a second sequence of programming operations on a second set of cells addressable by the second wordline, wherein a first order of the first sequence of programming operations proceeds from a first end of the memory array to a second end of the memory array and a second order of the second sequence of programming operations proceeds from the second end of the memory array to the first end of the memory array.

14 . The non-transitory computer-readable storage medium of claim 13 , wherein the processing device is to perform operations further comprising:

receiving a request to perform a third sequence of programming operations;

identifying a third wordline of the memory device, wherein a third physical location of the third wordline is in a predefined relationship with the first physical location of the first wordline and the second physical location of the second wordline; and

performing the third sequence of programming operations on a third set of cells addressable by the third wordline, wherein a third order of the third sequence of programming operations is different from at least one of: the first order of the first sequence of programming operations or the second order of the second sequence of programming operations.

15 . The non-transitory computer-readable storage medium of claim 14 , wherein the first wordline and the second wordline of the memory device each reside on a first die of the memory device, and wherein the third wordline of the memory device resides on a second die of the memory device.

16 . The non-transitory computer-readable storage medium of claim 13 , wherein the first sequence of programming operations is a source to drain programming sequence.

17 . The non-transitory computer-readable storage medium of claim 13 , wherein the second sequence of programming operations is a drain to source programming sequence.