Performing select input/output requests while in protected memory states

1 . A computer-implemented method, comprising:

receiving an indication that a memory has entered a protected state;

receiving input/output (I/O) requests intended for target locations in the memory;

determining whether the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, by:

comparing the target locations with memory blocks that have been listed in a buffer as having a sufficient number of invalid pages,

identifying an overlap between one or more of the target locations and the memory blocks listed in the buffer, and

in response to identifying the overlap between one or more of the target locations and the memory blocks listed in the buffer, concluding the one or more of the target locations are permitted to perform I/O requests;

in response to determining one or more of the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, determining whether the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state by:

using a trained machine learning model to:

inspect blocks in the memory at the target locations,

identify invalid ones of the blocks at the target locations, and

determine an amount of available space the one or more of the I/O requests will produce in the blocks at the target locations as a result of being performed; and

in response to determining one or more of the target locations are not permitted to perform I/O requests while the memory is in the protected state, denying the respective I/O requests.

2 . The computer-implemented method of claim 1 , comprising:

in response to determining one or more of the target locations are permitted to perform I/O requests while the memory is in the protected state, causing a delay to be applied to the one or more of the I/O requests before they are performed at the corresponding target locations,

wherein the delay applied to the one or more of the I/O requests is inversely proportional to a current amount of available space in the memory,

wherein determining whether the target locations are permitted to perform I/O requests while the memory is in the protected state includes:

comparing the target locations with a predetermined list of memory locations that are permitted to perform I/O requests while the memory is in the protected state,

wherein the memory is NAND Flash.

3 . The computer-implemented method of claim 1 , comprising:

in response to receiving the indication that the memory has entered a protected state, requesting registers of memory locations that are permitted to perform I/O requests while the memory is in the protected state; and

in response to receiving a first register, using the first register to determine whether the target locations are permitted to perform I/O requests while the memory is in the protected state.

4 . The computer-implemented method of claim 3 , comprising:

in response to receiving a second register, using the second register to determine whether the target locations are permitted to perform I/O requests while the memory is in the protected state,

wherein the first register corresponds to a first host and the second register corresponds to a second host, wherein the first register includes memory tracks and/or volumes that are allocated to the first host, wherein the second register includes memory tracks and/or volumes that are allocated to the second host.

5 . The computer-implemented method of claim 1 , comprising:

in response to determining one or more of the I/O requests are received from sources that are not permitted to initiate I/O requests while the memory is in the protected state, denying the respective one or more of the received I/O requests.

6 . The computer-implemented method of claim 1 , comprising:

in response to determining that the amount of available space is outside a predetermined range, concluding that the I/O request is sufficiently significant; and

determining that the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state.

7 . The computer-implemented method of claim 5 , comprising:

in response to determining one or more of the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, causing the respective one or more of the received I/O requests to be performed at the corresponding target locations.

8 . The computer-implemented method of claim 1 , further comprising:

releasing a reserved portion of the memory in response to receiving the indication that the memory has entered a protected state,

wherein the memory is NAND Flash.

9 . A computer program product, comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable by a processor, executable by the processor, or readable and executable by the processor, to cause the processor to:

receive an indication that a memory has entered a protected state;

receive input/output (I/O) requests intended for target locations in the memory;

determine whether the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, by:

comparing the target locations with memory blocks that have been listed in a buffer as having a sufficient number of invalid pages, and

in response to identifying an overlap between one or more of the target locations and the memory blocks listed in the buffer, concluding the one or more of the target locations are permitted to perform I/O requests;

in response to determining one or more of the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, determine whether the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state by:

using a trained machine learning model to:

inspect blocks in the memory at the target locations,

identify invalid ones of the blocks at the target locations, and

determine an amount of available space the one or more of the I/O requests will produce in the blocks at the target locations as a result of being performed; and

in response to determining one or more of the target locations are not permitted to perform I/O requests while the memory is in the protected state, deny the respective I/O requests.

10 . The computer program product of claim 9 , wherein determining whether the target locations are permitted to perform I/O requests while the memory is in the protected state includes:

comparing the target locations with a predetermined list of memory locations that are permitted to perform I/O requests while the memory is in the protected state.

11 . The computer program product of claim 9 , wherein the program instructions are readable and/or executable by the processor to cause the processor to:

in response to receiving the indication that the memory has entered a protected state, request registers of memory locations that are permitted to perform I/O requests while the memory is in the protected state; and

in response to receiving a first register, use the first register to determine whether the target locations are permitted to perform I/O requests while the memory is in the protected state.

12 . The computer program product of claim 11 , wherein the program instructions are readable and/or executable by the processor to cause the processor to:

in response to receiving a second register, use the second register to determine whether the target locations are permitted to perform I/O requests while the memory is in the protected state,

wherein the first register corresponds to a first host and the second register corresponds to a second host, wherein the first register includes memory tracks and/or volumes that are allocated to the first host, wherein the second register includes memory tracks and/or volumes that are allocated to the second host.

13 . The computer program product of claim 9 , wherein the program instructions are readable and/or executable by the processor to cause the processor to:

in response to determining one or more of the I/O requests are received from sources that are not permitted to initiate I/O requests while the memory is in the protected state, deny the respective one or more of the received I/O requests.

14 . The computer program product of claim 9 , comprising:

in response to determining that the amount of available space is outside a predetermined range, concluding that the I/O request is sufficiently significant; and

determining that the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state.

15 . The computer program product of claim 13 , wherein the program instructions are readable and/or executable by the processor to cause the processor to:

in response to determining one or more of the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, cause the respective one or more of the received I/O requests to be performed at the corresponding target locations.

16 . A system, comprising:

memory;

a processor; and

logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to:

receive an indication that the memory has entered a protected state;

receive input/output (I/O) requests intended for target locations in the memory;

determine whether the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, by:

comparing the target locations with memory blocks that have been listed in a buffer as having a sufficient number of invalid pages, and

in response to identifying an overlap between one or more of the target locations and the memory blocks listed in the buffer, concluding the one or more of the target locations are permitted to perform I/O requests;

in response to determining one or more of the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, determine whether the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state by:

using a trained machine learning model to:

inspect blocks in the memory at the target locations, identify invalid ones of the blocks at the target locations, and

determine an amount of available space the one or more of the I/O requests will produce in the blocks at the target locations as a result of being performed; and

in response to determining one or more of the target locations are not permitted to perform I/O requests while the memory is in the protected state, deny the respective I/O requests.

17 . The system of claim 16 , wherein the logic is configured to:

in response to receiving the indication that the memory has entered a protected state, request registers of memory locations that are permitted to perform I/O requests while the memory is in the protected state; and

in response to receiving a first register, use the first register to determine whether the target locations are permitted to perform I/O requests while the memory is in the protected state.

18 . The system of claim 17 , wherein the logic is configured to:

in response to receiving a second register, use the second register to determine whether the target locations are permitted to perform I/O requests while the memory is in the protected state,

wherein the first register corresponds to a first host and the second register corresponds to a second host, wherein the first register includes memory tracks and/or volumes that are allocated to the first host, wherein the second register includes memory tracks and/or volumes that are allocated to the second host.

19 . The system of claim 16 , wherein the logic is configured to:

in response to determining one or more of the I/O requests are received from sources that are not permitted to initiate I/O requests while the memory is in the protected state, deny the respective one or more of the received I/O requests.

20 . The system of claim 19 , wherein the logic is configured to:

in response to determining one or more of the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, cause the respective one or more of the received I/O requests to be performed at the corresponding target locations.

21 . A computer-implemented method, comprising:

receiving an indication that a memory has entered a write protect state;

receiving input/output (I/O) requests from sources, the I/O requests intended for target locations in the memory;

determining whether the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, by:

comparing the target locations with memory blocks that have been listed in a buffer as having a sufficient number of invalid pages,

identifying an overlap between one or more of the target locations and the memory blocks listed in the buffer, and

in response to identifying the overlap between one or more of the target locations and the memory blocks listed in the buffer, concluding the one or more of the target locations are permitted to perform I/O requests;

in response to determining one or more of the I/O requests are received from sources that are not permitted to initiate I/O requests while the memory is in the protected state, denying the respective one or more of the received I/O requests;

in response to determining one or more of the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, determining whether the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state by:

using a trained machine learning model to:

evaluate use data associated with how physical blocks in the memory are being used at the target locations in real-time,

identify invalid ones of the physical blocks at the target locations, and determine an amount of available space the one or more of the I/O requests will produce in the physical blocks at the target locations as a result of being performed; and

in response to determining the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state, causing the respective one or more of the received I/O requests to be performed at the corresponding target locations.

22 . The computer-implemented method of claim 21 , wherein determining whether the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state includes determining whether each I/O request includes a flag that has been set by the respective source, wherein the determining whether the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state includes:

producing a classification value representing a relative significance of the received I/O request;

in response to determining that the classification value of the I/O request is outside a predetermined range, concluding that the I/O request is sufficiently significant;

determining that the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state; and

causing a delay to be applied to the one or more of the I/O requests before they are performed at the corresponding target locations, wherein the delay applied to the one or more of the I/O requests is inversely proportional to a current amount of available space in the memory.

23 . The computer-implemented method of claim 21 , wherein each source corresponds to a respective host logical partition, wherein each host logical partition is correlated with a respective set of target locations in the memory that the host logical partition is permitted to perform I/O requests at while the memory is in the protected state.

24 . A computer program product, comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable by a processor, executable by the processor, or readable and executable by the processor, to cause the processor to:

receive an indication that a memory has entered a write protect state;

receive input/output (I/O) requests from sources, the I/O requests intended for target locations in the memory;

determine whether the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, by:

comparing the target locations with memory blocks that have been listed in a buffer as having a sufficient number of invalid pages, and

in response to identifying an overlap between one or more of the target locations and the memory blocks listed in the buffer, concluding the one or more of the target locations are permitted to perform VO requests;

in response to determining one or more of the I/O requests are received from sources that are not permitted to initiate I/O requests while the memory is in the protected state, deny the respective one or more of the received I/O requests;

in response to determining one or more of the I/O requests are received from sources that are permitted to initiate I/O requests while the memory is in the protected state, determine whether the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state by:

using a trained machine learning model to:

evaluate use data associated with how physical blocks in the memory are being used at the target locations in real-time,

identify invalid ones of the physical blocks at the target locations, and

determine an amount of available space the one or more of the I/O requests will produce in the physical blocks at the target locations as a result of being performed; and

in response to determining the corresponding target locations are permitted to perform the one or more of the I/O requests while the memory is in the protected state, cause the respective one or more of the received I/O requests to be performed at the corresponding target locations.