Access-protection control for non-volatile memory
An electronic device includes a memory interface and a Non-Volatile memory (NVM) controller. The memory interface is to communicate with an NVM. The NVM controller is to manage reading and writing of data in the NVM, to hold one or more Access-Protection (AP) policies that are defined for one or more respective AP requestors, and to permit or deny access to given data in the NVM in accordance with an AP policy defined for an AP requestor that requested the access to the given data.
1 . An electronic device, comprising:
a memory interface, to communicate with a Non-Volatile memory (NVM); and
an NVM controller, to:
manage reading and writing of data in the NVM;
hold one or more Write-Protection (WP) policies that are defined for one or more respective requestors;
receive a WP signal indicating whether writing to the NVM is permitted;
receive, from a requestor among the requestors, a request to write given data to the NVM; and
permit writing of the given data to the NVM only when both (i) a WP policy defined for the requestor that requested the writing of the given data is met, and (ii) the WP signal indicates that writing to the NVM is permitted.
2 . The electronic device according to claim 1 , further comprising one or more processors, to request access to the NVM.
3 . The electronic device according to claim 1 , wherein the WP policy specifies a set of addresses in the NVM to which writing is protected.
4 . The electronic device according to claim 3 , wherein the set of addresses is non-contiguous.
5 . The electronic device according to claim 1 , wherein the one or more WP policies comprise:
a first WP policy, defined for a first requestor, the first WP policy specifying a first set of addresses in the NVM to which writing is protected; and
a second WP policy, defined for a second requestor, the second WP policy specifying a second set of addresses in the NVM to which writing is protected, the second set being different from the first set.
6 . The electronic device according to claim 1 , wherein, in accordance with the WP policy, the NVM controller is to authenticate an identity of the requestor.
7 . The electronic device according to claim 1 , wherein, in accordance with the WP policy, the NVM controller is to authenticate written data that is subject to the WP policy.
8 . A method for Write Protection (WP) for a Non-Volatile memory (NVM), the method comprising:
holding one or more WP policies that are defined for one or more respective requestors;
receiving a WP signal indicating whether writing to the NVM is permitted;
receiving, from a requestor among the requestors, a request to write given data to the NVM; and
permitting writing of the given data to the NVM only when both (i) a WP policy defined for the requestor that requested the writing of the given data is met, and (ii) the WP signal indicates that writing to the NVM is permitted.
9 . The method according to claim 8 , further comprising receiving requests to access the NVM from one or more processors.
10 . The method according to claim 8 , wherein the WP policy specifies a set of addresses in the NVM to which writing is protected.
11 . The method according to claim 10 , wherein the set of addresses is non-contiguous.
12 . The method according to claim 8 , wherein the one or more WP policies comprise:
a first WP policy, defined for a first requestor, the first WP policy specifying a first set of addresses in the NVM to which writing is protected; and
a second WP policy, defined for a second requestor, the second WP policy specifying a second set of addresses in the NVM to which writing is protected, the second set being different from the first set.
13 . The method according to claim 8 , wherein, in accordance with the WP policy, the NVM controller is to authenticate an identity the WP requestor.
14 . The method according to claim 8 , and comprising, in accordance with the WP policy, authenticating written data that is subject to the WP policy.