IP Library Granted Patent US 12705168
Granted Patent B2
US 12705168 · App. 18/768,240 · Granted Aug 11, 2026

Near-memory time-synchronized telemetry logging

Inventor: David Andrew Roberts (Wellesley, MA)
Assignee: Micron Technology, Inc.
G06F12/0223G06F13/4221G06F2213/0026
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Quick Facts
Patent No.
US 12705168
App. No.
18/768,240
Granted
Aug 11, 2026
Kind
B2
Abstract

A memory controller of a memory device can receive an insertion notification related to near-memory telemetry data, and can collect the near-memory telemetry data based on the insertion notification. The near-memory telemetry data can be included in a log stored in a memory array of the memory device, and the logged near-memory telemetry data can be sent to a host device, in some examples.

Claims (37)

1 . A memory device comprising:

one or more integrated circuit (IC) memory dies configured as a memory array; and

a memory controller to control access to the memory array, the memory controller configured to:

receive an insertion notification related to near-memory telemetry data, wherein the insertion notification includes a unique identifier including a host process program counter (PC) and process identification (PID);

collect the near-memory telemetry data based on the insertion notification;

include the near-memory telemetry data in a log stored in a memory array of the memory device; and

send the logged near-memory telemetry data to a host device.

2 . The memory device of claim 1 , wherein the near-memory telemetry data includes one or more of interface or internal memory bandwidth measurements.

3 . The memory device of claim 1 , wherein the near-memory telemetry data includes one or more of interface or internal memory latency measurements.

4 . The memory device of claim 1 , wherein the near-memory telemetry data includes queue occupancy of the memory device.

5 . The memory device of claim 1 , wherein the near-memory telemetry data includes a memory-side cache hit rate.

6 . The memory device of claim 1 , wherein the near-memory telemetry data includes near-memory computing (NMC) telemetry data self-generated by a user-defined function.

7 . A method of operating a memory device, the method comprising:

receiving, by a memory controller of the memory device, an insertion notification related to near-memory telemetry data;

collecting, by the memory controller, the near-memory telemetry data based on the insertion notification, wherein the insertion notification includes an encoded sequence of addresses from the host device;

including, by the memory controller, the near-memory telemetry data in a log stored in a memory array of the memory device; and

sending, by the memory controller, the logged near-memory telemetry data to a host device.

8 . The method of claim 7 , wherein the insertion notification is based on a special memory request from the host device.

9 . The method of claim 7 , wherein the insertion notification is based on a programmable timer of the memory device.

10 . The method of claim 7 , wherein the insertion notification is based on a decision of a near-memory computing (NMC) device.

11 . The method of claim 7 , wherein the insertion notification includes an indication of a subset of telemetry data to be collected.

12 . The method of claim 7 , wherein the insertion notification includes an indication of a type of telemetry data to be collected.

13 . The method of claim 7 , wherein the insertion notification includes a unique identifier configured to align current code execution with the near-memory telemetry data.

14 . The method of claim 13 , wherein the unique identifier includes a host process program counter (PC) and process identification (PID).

15 . The method of claim 13 , wherein the unique identifier includes a programmer-defined unique sequence.

16 . The method of claim 13 , wherein the near-memory telemetry data is tagged with the unique identifier when inserting the near-memory telemetry data in the log.

17 . A computer system comprising:

at least one host device including a host processor;

a memory bus and a host input/output (I/O) channel; and

at least one memory device coupled to the at least one host device by the memory bus and host I/O channel, wherein the at least one memory device includes:

one or more integrated circuit (IC) memory dies configured as a memory array; and

a memory controller to control access to the memory array, the memory controller configured to:

receive an insertion notification related to near-memory telemetry data, wherein the insertion notification includes a unique identifier configured to align current code execution with the near-memory telemetry data, and wherein the unique identifier includes a programmer-defined unique sequence;

collect the near-memory telemetry data based on the insertion notification;

include the near-memory telemetry data in a log stored in the memory array of the at least one memory device, wherein the near-memory telemetry data is tagged with the unique identifier when inserting the near-memory telemetry data in the log; and

send the logged near-memory telemetry data to a host device.

18 . The computer system of claim 17 , wherein the unique identifier includes a host process program counter (PC) and process identification (PID).