Selectable cache writing policies for cache management
Systems, apparatuses, and methods related to selectable cache writing policies for cache management are described. A cache writing policy to manage a cache can be selected among cache writing policies based on a number of tracked criteria, which can provide cache management with a particular cache writing policy that will likely incur less latency than the other policies.
1 . An apparatus, comprising:
a cache; and
a controller coupled to the cache and configured to:
receive a memory access command from a host; and
responsive to a selectable cache writing policy being enabled, manage, to execute the memory access command, at least a portion of the cache using a first cache writing policy, comprising a write-through policy, or a second cache writing policy, comprising a write-back policy, wherein the selected policy is selected based on a particular value obtained from a first ratio normalized by a function of a second ratio, wherein:
the first ratio of a quantity of tracked access commands with dirty cache hits to a total quantity of the tracked access commands to the at least the portion of the cache; and
the second ratio of a quantity of tracked read commands to at least the portion of the cache among a total quantity of tracked read or write commands.
2 . The apparatus of claim 1 , wherein the controller is configured to track the first and second ratios as one or more access commands are being received at the apparatus.
3 . The apparatus of claim 1 , wherein the controller is coupled to an external memory comprising firmware executable to select the first cache writing policy or the second cache writing policy based on the particular value obtained from the first ratio normalized by a function of the second ratio.
4 . The apparatus of claim 3 , wherein the firmware is further executable to indicate the selected cache writing policy to the controller to allow the controller to execute the memory access command using the selected policy.
5 . The apparatus of claim 3 , wherein the firmware is executable to enable or disable the selectable cache writing policy.
6 . The apparatus of claim 3 , wherein the firmware is stored in a serial peripheral interface (SPI) flash memory.
7 . A method, comprising:
receiving a memory access command;
responsive to receiving the memory access command:
obtaining a number of criteria that are determined based on one or more previous memory access commands, wherein the number of criteria comprises:
a ratio of a quantity of tracked access commands with dirty cache hits to a total quantity of the tracked access commands to at least a portion of the cache; and
a ratio of a quantity of tracked read commands to at least the portion of the cache among a total quantity of the tracked read or write commands; and
selecting a first cache writing policy, comprising a write-through policy, or a second cache writing policy, comprising a write-back policy, wherein the selected policy is selected based on a particular value obtained from the first ratio normalized by a function of the second ratio; and
managing the at least the portion of cache using the selected policy to execute the memory access command.
8 . The method of claim 7 , wherein obtaining the number of criteria that are determined based on the one or more previous memory access commands comprises obtaining:
a cache hit rate;
the ratio of the quantity of the tracked access commands with dirty cache hits to the total quantity of the tracked access commands to the at least the portion of the cache; and
the ratio of the quantity of the tracked read commands to the at least the portion of cache among the total quantity of the tracked read or write commands to the cache.
9 . The method of claim 8 , wherein the cache comprises a plurality of cache lines each associated with a respective set of dirty bits and the method further comprises selecting the policy further based on a quantity of dirty bits of the respective set.
10 . The method of claim 7 , further comprising determining, based on the determined number of criteria, a normalized ratio of a number of the access commands to one or more memory devices that would be incurred according to a first policy of a plurality of cache writing policies to a number of the access commands to one or more memory devices that would be incurred according to a second policy of the plurality of cache writing policies.
11 . An apparatus, comprising:
a number of memory devices; and
a controller coupled to the number of memory devices, wherein the controller includes a cache and is configured to:
receive memory access command; and
perform one or more memory operations corresponding to the memory access command to access at least a portion of the cache or one or more of the number of memory devices, or both, according to a selected policy of a plurality of cache writing policies comprising a write-through policy and a write-back policy, wherein the selected policy is selected based on a particular value obtained from a first ratio normalized by a function of a second ratio, wherein:
the first ratio of a quantity of tracked access commands with dirty cache hits to a total quantity of tracked access commands to at least the portion of the cache; and
the second ratio of a quantity of tracked read commands to the at least the portion of the cache among a total quantity of tracked read or write commands to the at least the portion of the cache.
12 . The apparatus of claim 3 , wherein, under the write-back policy, the controller is configured to access the one or more memory devices in response to a dirty cache hit associated with at least a portion of the one or more memory operations performed at at least the portion of the cache for the memory access command.
13 . The apparatus of claim 3 , wherein, under the write-through policy, the controller is configured to access the one or more memory devices in response to a cache miss associated with at least a portion of the one or more memory operations performed at the cache for the memory access command.
14 . The apparatus of claim 11 , wherein the cache comprises a plurality of dirty bits each associated with a respective cache line of a plurality of cache lines of the cache.
15 . The apparatus of claim 11 , wherein the cache comprises a plurality of cache lines each associated with a respective set of dirty bits of the cache.
16 . The apparatus of claim 15 , wherein the controller is configured to select the policy among the plurality of cache writing policies further based on a quantity of dirty bits of the respective set.
17 . The apparatus of claim 16 , wherein the controller is configured to select the policy among the plurality of cache writing policies further based on an average of the quantity of the dirty bits of the respective set indicating that a respective portion of the cache is dirty.
18 . A method, comprising:
receiving a number of memory access commands;
selecting, for each of the number of memory access commands, a respective policy among a first cache writing policy, comprising a write-through policy, or a second cache writing policy, comprising a write-back policy, wherein the selected policy incurs less latency than other policies of a plurality, wherein the cache writing policy is selected based on a particular value obtained from a first ratio normalized by a function of a second ratio, wherein:
the first ratio of a quantity of tracked access commands with dirty cache hits to a total quantity of tracked access commands to at least a portion of the cache; and
the second ratio of a quantity of tracked read commands to the at least the portion of the cache among a total quantity of tracked read or write commands to the at least the portion of the cache; and
sequentially performing, according to the selected respective policy, a respective set of memory operations corresponding to each of the number of memory access commands.
19 . The method of claim 18 , wherein selecting the respective policy among the cache writing policies further comprises comparing a number of accesses that would be incurred for one policy of the plurality to that of the other policies of the plurality as measured at a cache hit rate, the ratio of a quantity of the tracked access commands with dirty cache hits to the total quantity of the tracked access commands to the at least the portion of the cache, and the ratio of a quantity of the tracked read commands to the at least the portion of the cache among the total quantity of the tracked read or write commands to the at least the portion of the cache.
20 . The method of claim 18 , further comprising updating the first and second ratios as a respective access command of the number of access commands is being executed.