IP Library Granted Patent US 12705187
Granted Patent B2
US 12705187 · App. 19/010,157 · Granted Aug 11, 2026

Method for accessing storage device and associated system-on-chip

Inventors: Feng-Hsin Chiang (Hsin-Chu City, TW); Sen-Chin Liu (Hsin-Chu City, TW); Tai-Xiang Liao (Hsin-Chu City, TW)
Assignee: Faraday Technology Corp.
G06F12/1408G06F12/0246G06F21/00G06F21/70G06F21/72G06F21/78G06F21/79G06F2212/1052G06F2221/2107
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Quick Facts
Patent No.
US 12705187
App. No.
19/010,157
Granted
Aug 11, 2026
Kind
B2
Abstract

The present invention provides a method for accessing a storage device. The method includes the steps of: establishing a command and writing the command into an entry of a submission queue, wherein the command includes queue identity of the submission queue, an index value of the entry, a logical block address offset and a physical address; setting a sibling submission queue, wherein the sibling submission queue comprises multiple security information; retrieving specific security information from the sibling submission queue according the queue identity corresponding to the command and the index value of the entry; and encrypting or decrypting data according to the logical block address offset of the command and the specific security information.

Claims (20)

1 . A method for accessing a storage device, performed by a system-on-chip (SoC), comprising:

establishing, by a core circuit of the SoC, a command and writing the command into an entry of a submission queue, wherein the command comprises a queue identity of the submission queue, an index value of the entry, a logical block address offset and a physical address;

setting, by the core circuit, a sibling submission queue, wherein the sibling submission queue comprises multiple security information;

retrieving, by a security control circuit of the SoC, specific security information from the sibling submission queue according the queue identity corresponding to the command and the index value of the entry; and

encrypting or decrypting, by a security engine of the SoC, data according to the logical block address offset of the command and the specific security information.

2 . The method of claim 1 , wherein the specific security information comprises a starting logical block address, a security key and encryption/decryption information.

3 . The method of claim 2 , wherein the step of encrypting or decrypting, by the security engine of the SoC, the data according to the logical block address offset of the command and the specific security information comprises:

if the encryption/decryption information indicates that the command is a write command, encrypting the data and sending encrypted data to the storage device; and

if the encryption/decryption information indicates that the command is a read command, receiving the data from the storage device and decrypting the data.

4 . The method of claim 2 , wherein the step of encrypting or decrypting, by the security engine of the SoC, the data according to the logical block address offset of the command and the specific security information comprises:

obtaining one or more logical block addresses, the encryption key and the encryption/decryption information according to the logical block address offset and the specific security information, to encrypt or decrypt the data.

5 . The method of claim 1 , wherein the storage device comprises a flash memory controller and a flash memory module.

6 . A system-on-chip (SoC) configured to access a storage device, comprising:

a core circuit, configured to establish a command and write the command into an entry of a submission queue, wherein the command comprises a queue identity of the submission queue, an index value of the entry, a logical block address offset and a physical address; and set a sibling submission queue, wherein the sibling submission queue comprises multiple security information;

a security control circuit, configured to retrieving specific security information from the sibling submission queue according the queue identity corresponding to the command and the index value of the entry; and

a security engine, configured to encrypt or decrypt data according to the logical block address offset of the command and the specific security information.

7 . The SoC of claim 6 , wherein the specific security information comprises a starting logical block address, a security key and encryption/decryption information.

8 . The SoC of claim 7 , wherein if the encryption/decryption information indicates that the command is a write command, the security engine encrypts the data and sends encrypted data to the storage device; and if the encryption/decryption information indicates that the command is a read command, the security engine receives the data from the storage device and decrypts the data.

9 . The SoC of claim 7 , wherein the security control circuit obtains one or more logical block addresses, the encryption key and the encryption/decryption information according to the logical block address offset and the specific security information, to encrypt or decrypt the data.

10 . The SoC of claim 6 , wherein the storage device comprises a flash memory controller and a flash memory module.