Arm security firmware configuration method and apparatus applied to arm server

1 . A method for configuring an ARM (Advanced Reduced Instruction Set Computing Machines) safe firmware applied to an ARM server, wherein the method comprises:

by the ARM server, invoking the ARM safe firmware of the ARM server, and configuring a space register for a PCI (Peripheral Component Interconnect) link bridge and PCI devices of hierarchies of a quantity N under the PCI link bridge, wherein the ARM safe firmware is a processor firmware of the ARM server, and N is a positive integer greater than or equal to 3; and

inside the ARM safe firmware, adding, by the ARM server, AER (Advanced Error Reporting) error-identification data of all CPUs (Central Processing Units) of the ARM server.

2 . The method according to claim 1 , wherein the step of invoking the ARM safe firmware of the ARM server, and configuring the space register for the PCI link bridge and the PCI devices of the hierarchies of the quantity N under the PCI link bridge comprises:

in a process of loading and starting-up of the ARM safe firmware, invoking the ARM safe firmware, and scanning the PCI link bridges and the PCI devices of the hierarchies of the quantity N of all of the CPUs, to obtain a scanning result; and

in response to the scanning result indicating that the PCI devices of the hierarchies of the quantity N exist under the PCI link bridge, configuring the space register for the PCI devices of the hierarchies of the quantity N under the PCI link bridge.

3 . The method according to claim 2 , wherein the step of configuring the space register for the PCI devices of the hierarchies of the quantity N under the PCI link bridge comprises:

initializing the PCI devices of the hierarchies of the quantity N under the PCI link bridge; and

configuring the space register for the PCI devices of the hierarchies of the quantity N under the PCI link bridge.

4 . The method according to claim 2 , wherein before the step of invoking the ARM safe firmware, and scanning the PCI link bridges and the PCI devices of the hierarchies of the quantity N of all of the CPUs, to obtain the scanning result, the method comprises:

in response to the ARM server having been started up and loading of a BIOS (Basic Input Output System) having succeeded, loading the ARM safe firmware;

performing safe-starting-up checking to the ARM safe firmware; and

in response to the safe-starting-up checking of the ARM safe firmware having succeeded, performing internal-memory initialization of the ARM safe firmware.

5 . The method according to claim 4 , wherein the step of invoking the ARM safe firmware, and scanning the PCI link bridges and the PCI devices of the hierarchies of the quantity N of all of the CPUs, to obtain the scanning result comprises:

in response to the internal-memory initialization of the ARM safe firmware having been completed, invoking the ARM safe firmware, and scanning the PCI link bridges and the PCI devices of the hierarchies of the quantity N of all of the CPUs, to obtain the scanning result; and

configuring a PCI configuring space corresponding to the PCI link bridge in an internal memory that has been initialized.

6 . The method according to claim 5 , wherein the step of invoking the ARM safe firmware, and scanning the PCI link bridges and the PCI devices of the hierarchies of the quantity N of all of the CPUs further comprises:

according to a state of division of the PCI link bridge, scanning the PCI link bridge and the PCI devices of the hierarchies of the quantity N.

7 . The method according to claim 5 , wherein the step of configuring the space register for the PCI devices of the hierarchies of the quantity N under the PCI link bridge comprises:

inside the PCI configuring space, configuring space registers individually for the PCI devices of the hierarchies of the quantity N under the PCI link bridge.

8 . The method according to claim 5 , wherein after the step of invoking the ARM safe firmware, and scanning the PCI link bridges and the PCI devices of the hierarchies of the quantity N of all of the CPUs, to obtain the scanning result, the method further comprises:

in response to the scanning result indicating that the hierarchies of the PCI devices under the PCI link bridge are less than N, reserving a register configuring space corresponding to the PCI link bridge inside the PCI configuring space.

9 . The method according to claim 8 , wherein after the step of reserving the register configuring space corresponding to the PCI link bridge inside the PCI configuring space, the method further comprises:

inside the reserved register configuring space, configuring the space register for the PCI devices of the hierarchies of the quantity N that are accessed subsequently.

10 . The method according to claim 1 , wherein the step of, inside the ARM safe firmware, adding the AER error-identification data of all of the CPUs of the ARM server comprises:

acquiring link bridges under all of the CPUs of the ARM server, and all of the PCI devices under the link bridges under all of the CPUs; and

inside the ARM safe firmware, adding AER error-identification data of all of the PCI devices under the link bridges under all of the CPUs.

11 . The method according to claim 10 , wherein the step of, inside the ARM safe firmware, adding the AER error-identification data of all of the PCI devices under the link bridges under all of the CPUs comprises:

acquiring AER configuration data of the link bridges under all of the CPUs; and

inside the ARM safe firmware, based on the AER configuration data, initializing all of the PCI devices under the link bridges under all of the CPUs, to add the AER error-identification data.

12 . The method according to claim 1 , wherein after the step of adding the AER error-identification data of all CPUs of the ARM server, the method further comprises:

detecting whether the PCI devices under all of instances of the PCI link bridge under the ARM safe firmware have been completely configured; and

in response to the PCI devices under all of the PCI link bridges having been completely configured, starting up an UEFI (Unified Extensible Firmware Interface) firmware of the ARM server, and starting up and loading a virtual-cloud-disk system.

13 . The method according to claim 12 , wherein after the step of detecting whether the PCI devices under all of the PCI link bridges under the ARM safe firmware have been completely configured, the method further comprises:

in response to an un-configured PCI link bridge existing in the PCI devices under all of the PCI link bridges, acquiring the PCI devices under the un-configured PCI link bridge; and

performing the register configuring and the adding of the AER error-identification data sequentially to the un-configured PCI link bridge and the PCI devices under the un-configured PCI link bridge.

14 . The method according to claim 12 , wherein after the step of starting up the UEFI firmware of the ARM server, and starting up and loading the virtual-cloud-disk system, the method further comprises:

in response to the PCI devices being restarted and the virtual-cloud-disk system being restarted, determining whether crashing happens in the ARM server; and

in response to crashing not happening in the ARM server, determining that the configuring of the ARM safe firmware succeeds.

15 . The method according to claim 14 , wherein the step of, in response to the PCI devices being restarted and the virtual-cloud-disk system being restarted, determining whether crashing happens in the ARM server comprises:

in response to the PCI devices not having a problem of restarting crashing, and the virtual-cloud-disk operating system not having the problem of restarting crashing either, determining that crashing does not happen in the ARM server.

16 . The method according to claim 14 , wherein after the step of determining whether crashing happens in the ARM server, the method further comprises:

in response to crashing happening in the ARM server, outputting a crashing alarming message.

17 . The method according to claim 1 , wherein the ARM server comprises at least one instance of the CPUs.

18 . An electronic device, wherein the electronic device comprises:

a memory, a processor and a computer program that is stored in the memory and is executable in the processor, and the computer program, when executed by the processor, implements the method for configuring an ARM safe firmware applied to an ARM server according to claim 1 .

19 . A non-volatile computer-readable storage medium, wherein an instruction in the non-volatile computer-readable storage medium, when executed by a processor of an electronic device, enables the electronic device to implement the method for configuring an ARM safe firmware applied to an ARM server according to claim 1 .