Method of optimizing area for logic cells and optimized logic cells

1 . A logic cell comprising:

a plurality of cells; and

a plurality of terminator cells at a boundary or edge of the plurality of cells,

wherein at least two terminator cells of the plurality of terminator cells extend across a plurality of voltage domains and form portions of a plurality of guard ring structures corresponding to the plurality of voltage domains, and wherein each guard ring structure of the plurality of guard ring structures forms a ring around cells of the plurality of cells in a respective voltage domain of the plurality of voltage domains.

2 . The logic cell of claim 1 , wherein cells of the plurality of cells are placed side by side in a single row, and

the plurality of terminator cells comprises at least one terminator cell at a left side of the single row and at least another one terminator cell at a right side of the single row.

3 . The logic cell of claim 1 , wherein cells of the plurality of cells are above one another in a single column, and

the plurality of terminator cells comprises one or more first terminator cells at a top of the single column and one or more second terminator cells at a bottom of the single column.

4 . The logic cell of claim 1 , wherein cells of the plurality of cells are in a two-dimensional array comprising of a plurality of rows and a plurality of columns, and

the logic cell comprising at least one of:

one or more first terminator cells from among the plurality of terminator cells at a left side of the two-dimensional array and one or more second terminator cells from among the plurality of terminator cells at a right side of the two-dimensional array, and

one or more third terminator cells from among the plurality of terminator cells at a top of the two-dimensional array and one or more fourth terminator cells from among the plurality of terminator cells at a bottom of the two-dimensional array.

5 . The logic cell of claim 1 , wherein cells of the plurality of cells are configured in a form of a non-rectangular structure, wherein the non-rectangular structure consists of a plurality of rows and a plurality of columns, and

the logic cell comprises at least one of:

one or more first terminator cells from among the plurality of terminator cells at a left side of the non-rectangular structure and one or more second terminator cells from among the plurality of terminator cells at a right side of the non-rectangular structure,

one or more third terminator cells from among the plurality of terminator cells at a top of the non-rectangular structure and one or more fourth terminator cells from among the plurality of terminator cells at a bottom of the non-rectangular structure, and

one or more fifth terminator cells from among the plurality of terminator cells at the left side of the non-rectangular structure, one or more sixth terminator cells from among the plurality of terminator cells at the right side of the non-rectangular structure, one or more seventh terminator cells from among the plurality of terminator cells at the top of the non-rectangular structure and one or more eight terminator cells from among the plurality of terminator cells at the bottom of the non-rectangular structure.

6 . The logic cell of claim 1 , wherein at least one terminator cell from among the plurality of the terminator cells is divided into multiple cells including corner terminator cells and a filler between the corner terminator cells.

7 . A method of optimizing area of a logic cell using a design tool, the method comprising:

creating a plurality of terminator cells for the logic cell using the design tool, wherein the logic cell comprises a plurality of cells; and

placing the plurality of terminator cells at a boundary or edge of the logic cell,

wherein at least two terminator cells of the plurality of terminator cells extend across a plurality of voltage domains and form portions of a plurality of guard ring structures corresponding to the plurality of voltage domains, and wherein each guard ring structure of the plurality of guard ring structures forms a ring around cells of the plurality of cells in a respective voltage domain of the plurality of voltage domains.

8 . The method of claim 7 , wherein the placing of the plurality of terminator cells comprises:

determining that the plurality of cells are placed side by side in a single row; and

placing at least one terminator cell from among the plurality of terminator cells at a left side of the single row and at least another one terminator cell from among the plurality of terminator cells at a right side of the single row.

9 . The method of claim 7 , wherein the placing of the plurality of terminator cells comprises:

determining that the plurality of cells are placed above one another in a single column; and

placing one or more first terminator cells from among the plurality of terminator cells at a top of the single column and one or more second terminator cells from among the plurality of terminator cells at a bottom of the single column.

10 . The method of claim 7 , wherein the placing of the plurality of terminator cells comprises:

determining that the plurality of cells are placed in a two-dimensional array comprising a plurality of rows and a plurality of columns; and

placing at least one of

one or more first terminator cells from among the plurality of terminator cells at a left side of the two-dimensional array and one or more second terminator cells from among the plurality of terminator cells at a right side of the two-dimensional array, and

one or more third terminator cells from among the plurality of terminator cells at a top of the two-dimensional array and one or more fourth terminator cells from among the plurality of terminator cells at a bottom of the two-dimensional array.

11 . The method of claim 7 , wherein the placing of the plurality of terminator cells comprises:

determining that the plurality of cells are placed in a form of a non-rectangular structure, wherein the non-rectangular structure consists of a plurality of rows and a plurality of columns; and

placing at least one of

one or more first terminator cells from among the plurality of terminator cells at a left side of the non-rectangular structure and one or more second terminator cells from among the plurality of terminator cells at a right side of the non-rectangular structure,

one or more third terminator cells from among the plurality of terminator cells at a top of the non-rectangular structure and one or more fourth terminator cells from among the plurality of terminator cells at a bottom of the non-rectangular structure, and

one or more fifth terminator cells from among the plurality of terminator cells at the left side of the non-rectangular structure, one or more sixth terminator cells from among the plurality of terminator cells at the right side of the non-rectangular structure,

one or more seventh terminator cells from among the plurality of terminator cells at the top of the non-rectangular structure, and one or more eighth terminator cells from among the plurality of terminator cells at the bottom of the non-rectangular structure.

12 . The method of claim 7 , wherein a terminator cell from among the plurality of terminator cells is divided into multiple cells including corner terminator cells and a filler between the corner terminator cells.