Display system and display device
A display system includes: a multi-scenario trigger circuit ( 10 ), which is configured to determine, according to a usage scenario triggered by a display device, a display partition used for high-definition display among a plurality of display partitions; a display content generation circuit ( 20 ), which is configured to render each frame of partition image of the display partition used for high-definition display, and fuse a partition identifier of the corresponding display partition into each frame of rendered partition image, so as to form a frame image data stream; a display drive control circuit ( 30 ), which is configured to generate a control instruction stream for driving the display partition used for high-definition display.
1 . A display system applied to a display device comprising a plurality of display partitions, comprising:
a multi-scenario trigger circuit, configured to determine, according to a usage scenario in which the display device is triggered, a display partition for high-definition display among the plurality of display partitions;
a display content generation circuit, configured to render each frame of a partition image of the display partition for high-definition display, and fuse a partition identifier of the display partition for high-definition display into each frame of the rendered partition image to form a corresponding frame image data stream;
a display drive control circuit, configured to generate a control instruction stream to drive the display partition for high-definition display so that the display partition for high-definition display displays each frame of an image in the frame image data stream; wherein, each control instruction in the control instruction stream carries a same time identifier as the corresponding rendered partition image;
a drive circuit, configured, for the frame image data stream and the control instruction stream which have a same partition identifier, to form control instructions which have a same time identifier, and rendered partition images into a group, and in chronological order, drive, group by group and according to a control instruction in a current group, the corresponding display partition to display the rendered partition image in the current group;
wherein all chips in the display device are connected in parallel with a same signal bus which is used to transmit data or instructions;
different chips time-multiplex the signal bus;
a separate signal line is provided in the display system applied to the display device for transmitting an enable signal, which is a pulse signal; the chips connected with the signal bus are configured to cache received control instructions simultaneously upon receipt of the enable signal.
2 . The display system of claim 1 , wherein the multi-scenario trigger circuit is further configured to:
when the display device is simultaneously triggered with a plurality of usage scenarios, determine, according to the plurality of usage scenarios, a display partition corresponding to each usage scenario.
3 . The display system of claim 2 , wherein the display content generation circuit is further configured to:
when the display device is simultaneously triggered with a plurality of usage scenarios, render each frame of partition image of the display partition for high-definition display corresponding to the usage scenarios with high priority sequentially according to a priority level of the plurality of usage scenarios, and fuse a corresponding partition identifier into each corresponding frame of the rendered partition image to form a frame image data stream corresponding to each display partition for high-definition display.
4 . The display system of claim 1 , wherein the display drive control circuit is further configured to:
generate corresponding drive state control instructions and timing control instructions according to the partition identifier of the display partition for high-definition display; the drive state control instruction is configured to perform function control on the drive circuit to control the display partition for high-definition display to perform high-definition display; the timing control instructions are configured to generate timing control signals required for image display for the display partition for high-definition display.
5 . The display system of claim 4 , wherein the drive circuit further comprises at least one TCON chip.
6 . The display system of claim 5 , wherein, when the partition image is a three-dimensional stereogram, the drive circuit comprises a plurality of the TCON chips, and each display partition for high-definition display corresponds to one TCON chip and one data channel.
7 . The display system of claim 1 , wherein the drive circuit comprises:
a source drive chip, which is configured to gate, according to a control instruction in the current group, a data channel corresponding to the display partition for high-definition display, and convert the rendered partition image in the current group into a corresponding data drive signal, which is provided to the display partition for high-definition display through the data channel to drive a corresponding column of pixels;
a gate drive circuit, which is configured to provide, according to a control instruction in the current group, a row scan signal to a plurality of pixel rows where the display partition for high-definition display is located, so as to refresh the data drive signal to the display partition for high-definition display.
8 . The display system of claim 7 , wherein the source drive chip comprises:
a plurality of data partitions, each of which corresponds to a data transmission channel for a column of display partitions.
9 . The display system of claim 7 , wherein the source drive chip is further configured to arrange a plurality of partition images corresponding to the display partition for high-definition display in an interval area between entire frame images.
10 . The display system of claim 7 , wherein in the gate drive circuit, a plurality of display partitions corresponding to a same row share a same frame start signal.
11 . The display system according to claim 7 , wherein, in the display device, the data channels of display partitions other than the display partition for high-definition display are in an off state.
12 . The display system of claim 7 , wherein the drive circuit is further configured to:
drive the display partition for high-definition display with idle resources; wherein, the idle resources are drive resources corresponding to display partitions other than the display partition for high-definition display.
13 . The display system of claim 1 , wherein a data format for data packets transmitted in the signal bus comprises:
a feature specification portion configured to indicate a type of instruction;
an identifier recognition portion configured as a chip and a chip partition corresponding to the data packet;
a register portion configured to store control instructions or data.
14 . A display device comprising the display system according to claim 1 .