Display substrate including multiple cascaded shift register units, preparation method thereof, and display device

1 . A display substrate, comprising a display region and a peripheral region on a periphery of the display region, wherein

a gate driving circuit is arranged in the peripheral region, and the gate driving circuit comprises multiple cascaded shift register units, at least one of the shift register units comprises at least one transistor of a first semiconductor type, at least one transistor of a second semiconductor type, and at least one capacitor, and types of the at least one transistor of the first semiconductor type and the at least one transistor of the second semiconductor type are different;

in a direction perpendicular to the display substrate, the display substrate comprises an underlay substrate, and a first semiconductor layer, a first conductive layer, a second semiconductor layer, a second conductive layer, and a third conductive layer which are arranged on the underlay substrate;

the first semiconductor layer at least comprises an active layer of the at least one transistor of the second semiconductor type of the at least one of the shift register units;

the first conductive layer at least comprises a control electrode of the at least one transistor of the second semiconductor type and a first electrode of the at least one capacitor of the at least one of the shift register units;

the second semiconductor layer at least comprises an active layer of the at least one transistor of the first semiconductor type of the at least one of the shift register units;

the second conductive layer at least comprises a control electrode of the at least one transistor of the first semiconductor type and a second electrode of the at least one capacitor of the at least one of the shift register units; and

the third conductive layer at least comprises first electrodes and second electrodes of the at least one transistor of the first semiconductor type and the at least one transistor of the second semiconductor type of the at least one of the shift register units;

wherein the first conductive layer further comprises a first output terminal, a second output terminal and a third output terminal of the at least one of the shift register units;

wherein the second conductive layer further comprises a control signal line;

wherein the third conductive layer further comprises a first power line and a second power line;

wherein the at least one of the shift register units comprises an input circuit, a first control circuit, a second control circuit, and an output circuit;

wherein the second control circuit is connected with the first power line, the second power line, the first output terminal, and a second output terminal, and is configured to provide an effective level signal of the first power line or the second power line to the second output terminal under control of the first output terminal; and

the output circuit is connected with a control signal line, the first power line, the second power line, the second output terminal, and a third output terminal, and is configured to output an effective level signal of the first power line or the second power line to the third output terminal under control of the control signal line and the second output terminal, wherein, within the time of one frame, a duration of an effective level signal provided by the third output terminal is longer than a duration of an effective level signal provided by the second output terminal.

2 . The display substrate according to claim 1 , wherein the output circuit comprises a first transistor, a second transistor, a third transistor, and a fourth transistor; wherein the first transistor and the second transistor are a transistor of the second semiconductor type, and the third transistor and the fourth transistor are a transistor of the first semiconductor type; wherein a control electrode of the first transistor is connected with the control signal line, a first electrode of the first transistor is connected with the first power line, and a second electrode of the first transistor is connected with a first electrode of the second transistor; a control electrode of the second transistor is connected with the second output terminal, and a second electrode of the second transistor is connected with the third output terminal.

3 . The display substrate according to claim 2 , wherein a control electrode of the third transistor is connected with the second output terminal, a first electrode of the third transistor is connected with the second power line, and a second electrode of the third transistor is connected with the third output terminal; and a control electrode of the fourth transistor is connected with the control signal line, a first electrode of the fourth transistor is connected with the second power line, and a second electrode of the fourth transistor is connected with the third output terminal.

4 . The display substrate according to claim 2 , wherein the second control circuit comprises a fifth transistor and a sixth transistor; wherein the fifth transistor is the transistor of the second semiconductor type, and the sixth transistor is the transistor of the first semiconductor type; wherein a control electrode of the fifth transistor is connected with the first output terminal, a first electrode of the fifth transistor is connected with the first power line, and a second electrode of the fifth transistor is connected with the second output terminal.

5 . The display substrate according to claim 4 , wherein a control electrode of the sixth transistor is connected with the first output terminal, a first electrode of the sixth transistor is connected with the second power line, and a second electrode of the sixth transistor is connected with the second output terminal.

6 . The display substrate according to claim 4 , wherein the fifth transistor is on a side of the first transistor and the second transistor close to the first control circuit, and the sixth transistor is on a side of the third transistor close to the first control circuit.

7 . The display substrate according to claim 6 , wherein the first electrode of the first transistor, the first electrode of the fifth transistor, and the first power line form an integrated structure.

8 . The display substrate according to claim 6 , wherein the second electrode of the fifth transistor and the second electrode of the sixth transistor form an integrated structure and are connected with the control electrode of the third transistor, the control electrode of the second transistor, and the second output terminal.

9 . A display device, comprising the display substrate according to claim 1 .

10 . A preparation method of the display substrate, for preparing the display substrate according to claim 1 , the preparation method comprising:

providing the underlay substrate; and

forming the first semiconductor layer, the first conductive layer, the second semiconductor layer, the second conductive layer, and the third conductive layer on the underlay substrate in the peripheral region on the periphery of the display region,

wherein the first semiconductor layer at least comprises the active layer of the at least one transistor of the second semiconductor type of the at least one shift register unit of the gate driving circuit; the first conductive layer at least comprises the control electrode of the at least one transistor of the second semiconductor type and the first electrode of the at least one capacitor of the at least one shift register unit; the second semiconductor layer at least comprises the active layer of the at least one transistor of the first semiconductor type of the at least one shift register unit; the second conductive layer at least comprises the control electrode of the at least one transistor of the first semiconductor type and the second electrode of the at least one capacitor of the at least one shift register unit; and the third conductive layer at least comprises the first electrodes and the second electrodes of the at least one transistor of the first semiconductor type and the at least one transistor of the second semiconductor type of the at least one shift register unit.

11 . The display substrate according to claim 1 , wherein the first control circuit comprises: a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a second capacitor, and a third capacitor;

wherein the twelfth transistor, the thirteenth transistor, and the fourteenth transistor are a transistor of the second semiconductor type; wherein a control electrode of the thirteenth transistor and a first electrode of the second capacitor is an integrated structure, and a control electrode of the fourteenth transistor and a first electrode of the third capacitor is an integrated structure.

12 . The display substrate according to claim 1 , wherein the input circuit comprises: a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, and a first capacitor;

wherein a control electrode of the seventh transistor and a first electrode of the first capacitor is an integrated structure.