IP Library › Granted Patent US 12706053
Granted Patent B2
US 12706053 · App. 19/016,701 · Granted Aug 11, 2026

Display apparatus

Inventors: Soojung Chae (Yongin-si, KR); Sungjoon Kwak (Yongin-si, KR); Jaehong Kim (Yongin-si, KR); Seokhwan Bang (Yongin-si, KR); Jaehyoung Youn (Yongin-si, KR); Jemin Lee (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3266G09G2310/0286G09G2320/0247G09G2330/021
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Quick Facts
Patent No.
US 12706053
App. No.
19/016,701
Granted
Aug 11, 2026
Kind
B2
Abstract

A display apparatus includes display elements disposed in a display area, a first bottom metal layer disposed on a substrate, a second bottom metal layer disposed on the first bottom metal layer, and a thin-film transistor disposed on the second bottom metal layer, the thin film transistor including a semiconductor layer and a gate electrode, the semiconductor layer including a channel region, and the gate electrode overlapping the semiconductor layer, the channel region includes a first region and a second region, the first region overlapping one of the first bottom metal layer and the second bottom metal layer in a plan view, and the second region overlapping the other of the first bottom metal layer and the second bottom metal layer in the plan view.

Claims (50)

1 . A display apparatus comprising:

a first bottom metal layer on a substrate;

a second bottom metal layer on the first bottom metal layer; and

a thin-film transistor on the second bottom metal layer, the thin-film transistor including a semiconductor layer and a gate electrode, the semiconductor layer including a channel region, and the gate electrode overlapping the semiconductor layer,

wherein the channel region includes a first region and a second region, the first region overlapping one of the first bottom metal layer and the second bottom metal layer in a plan view, and the second region overlapping the other of the first bottom metal layer and the second bottom metal layer in the plan view.

2 . The display apparatus of claim 1 , wherein the first bottom metal layer is electrically connected to the second bottom metal layer.

3 . The display apparatus of claim 2 , further comprising:

a gate connection electrode, the gate connection electrode and the gate electrode on a same layer,

wherein the gate connection electrode is electrically connected to the first bottom metal layer and the second bottom metal layer through a contact hole.

4 . The display apparatus of claim 1 , wherein the gate electrode, the first bottom metal layer, and the second bottom metal layer receive a same signal.

5 . The display apparatus of claim 1 , wherein the channel region includes a third region overlapping the first bottom metal layer and the second bottom metal layer.

6 . The display apparatus of claim 1 , further comprising:

a scan driver included in a peripheral area, the scan driver including the thin-film transistor.

7 . The display apparatus of claim 6 , wherein the scan driver includes a plurality of stages and an output terminal corresponding to a scan line corresponding electrically to each of the plurality of stages.

8 . The display apparatus of claim 1 , further comprising:

a pixel circuit included in a peripheral area, the pixel circuit including the thin-film transistor, and electrically connected to a display element.

9 . The display apparatus of claim 1 , wherein

the gate electrode includes branches extending in a first direction and electrically connected,

the first bottom metal layer includes first branch metals extending in the first direction and electrically connected, and

the second bottom metal layer includes second branch metals extending in the first direction and electrically connected.

10 . The display apparatus of claim 1 , wherein a distance between the first bottom metal layer and the channel region is greater than a distance between the second bottom metal layer and the channel region in a cross-sectional view.

11 . The display apparatus of claim 1 , further comprising:

a first buffer layer between the first bottom metal layer and the second bottom metal layer; and

a second buffer layer between the second bottom metal layer and the semiconductor layer,

wherein each of the first buffer layer and the second buffer layer includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

12 . A display apparatus comprising:

a pixel circuit included in a display area on a substrate and a display element electrically connected to the pixel circuit; and

a scan driver included in a peripheral area on the substrate, wherein the scan driver includes:

a first bottom metal layer on the substrate;

a second bottom metal layer electrically connected to the first bottom metal layer; and

a thin-film transistor on the second bottom metal layer, the thin-film transistor including a semiconductor layer and a gate electrode, wherein the semiconductor layer includes a channel region, and the gate electrode overlaps the semiconductor layer, and

the channel region includes a first region and a second region, the first region overlapping one of the first bottom metal layer and the second bottom metal layer, in a plan view, and the second region overlapping the other of the first bottom metal layer and the second bottom metal layer in the plan view.

13 . The display apparatus of claim 12 , wherein the channel region includes a third region overlapping the first bottom metal layer and the second bottom metal layer in a plan view.

14 . The display apparatus of claim 12 , wherein the gate electrode is electrically connected to the first bottom metal layer and the second bottom metal layer.

15 . The display apparatus of claim 12 , wherein

the gate electrode includes branch electrodes extending in a first direction and electrically connected,

the first bottom metal layer includes first branch metals extending in the first direction and electrically connected, and

the second bottom metal layer includes second branch metals extending in the first direction and electrically connected.

16 . The display apparatus of claim 15 , wherein

the branch electrodes include a first branch electrode and a second branch electrode each extending in a second direction perpendicular to the first direction,

the first branch metals include a first-1 branch metal overlapping at least a portion of the first branch electrode, and a first-2 branch metal overlapping at least a portion of the second branch electrode, and

the second branch metals include a second-1 branch metal overlapping at least a portion of the first branch electrode, and a second-2 branch metal overlapping at least a portion of the second branch electrode.

17 . The display apparatus of claim 16 , wherein a width in the second direction between the first-1 branch metal and the second-2 branch metal is greater than a width in the second direction between the first-1 branch metal and the second branch electrode.

18 . The display apparatus of claim 12 , wherein a distance between the first bottom metal layer and the channel region is greater than a distance between the second bottom metal layer and the channel region in a cross-sectional view.

19 . The display apparatus of claim 12 , further comprising:

a first buffer layer between the first bottom metal layer and the second bottom metal layer; and

a second buffer layer between the second bottom metal layer and the semiconductor layer,

wherein each of the first buffer layer and the second buffer layer includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

20 . The display apparatus of claim 12 , further comprising:

a gate connection electrode integral with the gate electrode, wherein the gate connection electrode is electrically connected to the first bottom metal layer and the second bottom metal layer through a contact hole.