IP Library Granted Patent US 12706132
Granted Patent B2
US 12706132 · App. 18/727,223 · Granted Aug 11, 2026

Operation method of semiconductor device

Inventors: Hidefumi Rikimaru (Tokyo, JP); Yoshiyuki Kurokawa (Sagamihara, JP); Satoru Ohshita (Hadano, JP)
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
G11C11/405G11C11/4096G11C11/54H10B12/00
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Quick Facts
Patent No.
US 12706132
App. No.
18/727,223
Granted
Aug 11, 2026
Kind
B2
Abstract

An operation method of a semiconductor device that performs data writing and correction processing is provided. The operation method is for a semiconductor device including a control circuit, a first circuit, a second circuit, a wiring, a cell, and a converter circuit. In the operation method, first, the control circuit transmits, to the first circuit, a first signal corresponding to the value of first data. Next, the first circuit outputs, to the wiring, a first current with an amount corresponding to the first signal. Moreover, the cell retains a first potential corresponding to the amount of first current. Then, the cell makes a second current corresponding to the first potential flow from the wiring, and the converter circuit outputs a second signal corresponding to the amount of second current. Next, the second circuit obtains a difference value between a value corresponding to the second signal and the value of the first data. If the difference value is 0, the operation is terminated. If the difference value is not 0, the control circuit generates an update value obtained by adding the difference value to a value corresponding to the first signal previously transmitted. The first circuit obtains the first signal corresponding to the update value and outputs the updated first current to the cell.

Claims (30)

1 . An operation method of a semiconductor device comprising a control circuit, a first circuit, a second circuit, a first wiring, a first cell, and a converter circuit, the operation method comprising a first step, a second step, a third step, a fourth step, a fifth step, and a sixth step,

wherein the control circuit is electrically connected to the first circuit and the second circuit,

wherein the first circuit is electrically connected to the first wiring,

wherein an input terminal of the converter circuit is electrically connected to the first wiring,

wherein an output terminal of the converter circuit is electrically connected to the second circuit,

wherein the first cell is electrically connected to the first wiring,

wherein the first step comprises an operation in which the control circuit transmits, to the first circuit, a first signal corresponding to a value of first data,

wherein the second step comprises:

an operation in which the first circuit generates a first current with an amount corresponding to the first signal by obtaining the first signal and outputs the first current to the first wiring; and

an operation in which the first current flowing from the first wiring to the first cell makes the first cell retain a first potential corresponding to the amount of the first current,

wherein the third step comprises:

an operation in which the first cell outputs a second current to the input terminal of the converter circuit through the first wiring; and

an operation in which the converter circuit outputs a second signal corresponding to the amount of the second current to the second circuit,

wherein the fourth step comprises:

an operation in which the control circuit outputs the first data to the second circuit;

an operation in which the second circuit calculates a difference value between a value corresponding to the second signal obtained from the converter circuit and the value corresponding to the first data obtained from the control circuit, and transmits the difference value to the control circuit; and

an operation in which the control circuit obtains the difference value, and operation termination is performed when the difference value is 0, whereas the operation method proceeds to the fifth step when the difference value is not 0,

wherein the fifth step comprises an operation in which the control circuit generates an update value obtained by adding the difference value to the value of the first data in the first step, and

wherein the sixth step comprises:

an operation in which the control circuit transmits, to the first circuit, the first signal corresponding to the update value; and

an operation of proceeding to the second step.

2 . The operation method of the semiconductor device, according to claim 1 ,

wherein the second circuit comprises a subtractor.

3 . The operation method of the semiconductor device, according to claim 1 ,

wherein the first cell comprises a first transistor, a second transistor, a third transistor, and a capacitor,

wherein one of a source and a drain of the first transistor is electrically connected to a gate of the second transistor,

wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the third transistor,

wherein the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the third transistor,

wherein a first terminal of the capacitor is electrically connected to the one of the source and the drain of the first transistor, and

wherein the first wiring is electrically connected to the other of the source and the drain of the first transistor.