IP Library Granted Patent US 12706167
Granted Patent B2
US 12706167 · App. 18/774,642 · Granted Aug 11, 2026

Enhancing read window budget using read verify

Inventors: Daniel Zhang (Milpitas, CA); Yu-Chung Lien (San Jose, CA); Peng Zhang (Los Altos, CA); Murong Lang (San Jose, CA); Zhenming Zhou (San Jose, CA)
Assignee: Micron Technology, Inc.
G11C16/3459G11C16/102G11C16/26G11C16/32
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Quick Facts
Patent No.
US 12706167
App. No.
18/774,642
Granted
Aug 11, 2026
Kind
B2
Abstract

The disclosure configures a memory sub-system controller to use prior read verify operations to selectively apply enhancements to read window budgets (RWB). The controller receives a request to perform a memory operation on data stored in an individual memory component of a set of memory components. The controller accesses RWB tracking information associated with the individual memory component and determines that the tracking information associated with the individual memory component indicates a need for enhancing a RWB associated with the memory operation. The controller applies one or more enhancement processes to the individual memory component in response to determining that the tracking information associated with the individual memory component indicates the need for enhancing the RWB associated with the memory operation.

Claims (48)

1 . A system comprising:

a set of memory components of a memory sub-system; and

at least one processing device operatively coupled to the set of memory components, the at least one processing device being configured to perform operations comprising:

receiving a request to perform a memory operation on data stored in an individual memory component of the set of memory components;

accessing read window budget (RWB) tracking information associated with the individual memory component;

determining that the tracking information associated with the individual memory component indicates a need for enhancing a RWB associated with the memory operation; and

applying one or more enhancement processes to the individual memory component in response to determining that the tracking information associated with the individual memory component indicates the need for enhancing the RWB associated with the memory operation.

2 . The system of claim 1 , the operations comprising:

performing the memory operation on the data stored in the individual memory component in response to applying the one or more enhancement processes to the individual memory component.

3 . The system of claim 1 , wherein the one or more enhancement processes are applied prior to performing the memory operation on the data stored in the individual memory component.

4 . The system of claim 1 , wherein the memory operation comprises a write request, the operations comprising:

programming the data to the individual memory component to which the one or more enhancement processes have been applied.

5 . The system of claim 1 , wherein the memory operation comprises a read request, the operations comprising:

reading the data from the individual memory component to which the one or more enhancement processes have been applied.

6 . The system of claim 1 , the operations comprising generating the tracking information by:

receiving a request to program the data to the individual memory component;

programming the data to the individual memory component;

after programming the data, performing a read verify operation on the programmed data;

computing a read bit error rate (RBER) associated with the read verify operation for the individual memory component; and

storing the tracking information associated with the individual memory component in response to computing the RBER associated with the read verify operation of the individual memory component.

7 . The system of claim 6 , the operations comprising:

determining that the RBER transgresses a threshold value; and

in response to determining that the RBER transgresses the threshold value, storing a value, as part of the tracking information, that indicates the need for enhancing the RWB associated with subsequent memory operations performed on the individual memory component.

8 . The system of claim 6 , the operations comprising:

determining that the RBER fails to transgress a threshold value; and

in response to determining that the RBER fails to transgress the threshold value, storing a value, as part of the tracking information, that indicates no need for enhancing the RWB associated with subsequent memory operations performed on the individual memory component.

9 . The system of claim 6 , the operations comprising:

accessing manufacturing information indicative of performance of the individual memory component.

10 . The system of claim 9 , the operations comprising:

storing the tracking information associated with the individual memory component in response to computing the RBER and based on the manufacturing information indicative of performance of the individual memory component.

11 . The system of claim 1 , wherein the individual memory component comprises a memory block, memory die, memory word line, or memory page.

12 . The system of claim 1 , wherein the one or more enhancement processes comprise at least one of step static operations, quad level cell (QLC) double fine operations, or program/read sense management.

13 . The system of claim 1 , wherein the one or more enhancement processes comprise modifying one or more trim levels for the individual memory component.

14 . The system of claim 1 , wherein the one or more enhancement processes comprise adjusting a program time for the individual memory component.

15 . The system of claim 1 , wherein the one or more enhancement processes comprise changing a location of a memory voltage to improve margin and cycling degradation for the individual memory component.

16 . The system of claim 1 , wherein the one or more enhancement processes comprise adjusting a read threshold voltage associated with reading data from the individual memory component.

17 . A method comprising:

receiving a request to perform a memory operation on data stored in an individual memory component of a set of memory components;

accessing read window budget (RWB) tracking information associated with the individual memory component;

determining that the tracking information associated with the individual memory component indicates a need for enhancing a RWB associated with the memory operation; and

applying one or more enhancement processes to the individual memory component in response to determining that the tracking information associated with the individual memory component indicates the need for enhancing the RWB associated with the memory operation.

18 . The method of claim 17 , wherein the one or more enhancement processes comprise at least one of step static operations, quad level cell (QLC) double fine operations, or program/read sense management.

19 . The method of claim 17 , wherein the one or more enhancement processes comprise adjusting a read threshold voltage associated with reading data from the individual memory component.

20 . A non-transitory computer-readable storage medium comprising instructions that, when executed by at least one processing device, cause the at least one processing device to perform operations comprising:

receiving a request to perform a memory operation on data stored in an individual memory component of a set of memory components;

accessing read window budget (RWB) tracking information associated with the individual memory component;

determining that the tracking information associated with the individual memory component indicates a need for enhancing a RWB associated with the memory operation; and

applying one or more enhancement processes to the individual memory component in response to determining that the tracking information associated with the individual memory component indicates the need for enhancing the RWB associated with the memory operation.