Data storage device having a memory block failure anticipation system
A data storage device includes a memory block failure anticipation system. The memory block failure anticipation system proactively detects defects in wordlines and/or memory blocks of the data storage device. To determine the presence of defects, the memory block failure anticipation system determines a failed bit count associated with one or more wordlines of a selected memory block and/or a failed bit count associated with the memory block. The failed bit count is compared against two thresholds—a block level data loss threshold and a wordline level data loss threshold. If the failed bit count exceeds the block level data loss threshold, the memory block is retired. If the failed bit count exceeds the wordline level data loss threshold but not the block level data loss threshold, a particular wordline of the memory block is retired and/or the memory block is retired.
1 . A method, comprising:
selecting a memory block from a pool of free memory blocks;
initiating an erase operation on the memory block;
determining whether a program/erase (P/E) cycle count for the memory block exceeds a P/E cycle threshold;
in response to determining the P/E cycle count for the memory block exceeds the P/E cycle threshold:
performing a read operation on a first wordline of a plurality of wordlines of the memory block;
determining whether each memory cell associated with the first wordline is in a first state or a second state;
determining whether a number of memory cells in the first state exceeds a first state threshold;
in response to determining the number of memory cells in the first state exceeds the first state threshold, marking the memory block as a failed memory block;
in response to determining the number of memory cells in the first state is less than the first state threshold, determining whether the number of memory cells in the first state exceeds a second state threshold; and
in response to determining the number of memory cells in the first state exceeds the second state threshold, marking the first wordline as a failed wordline.
2 . The method of claim 1 , further comprising:
selecting a second wordline of the plurality of wordlines;
determining whether each memory cell associated with the second wordline is in the first state or the second state;
determining whether a number of memory cells of the second wordline in the first state and the number of memory cells of the first wordline in the first state exceeds the first state threshold; and
in response to determining the number of memory cells of the second wordline in the first state and the number of memory cells of the first wordline in the first state exceeds the first state threshold, marking the memory block as a failed memory block.
3 . The method of claim 2 , further comprising:
in response to determining the number of memory cells of the second wordline in the first state and the number of memory cells of the first wordline in the first state is less than the first state threshold, determining whether the number of memory cells of the second wordline in the first state exceeds the second state threshold; and
in response to determining the number of memory cells of the second wordline in the first state exceeds the second state threshold, marking the second wordline as a failed wordline.
4 . The method of claim 1 , further comprising determining whether the memory block is a single-level cell (SLC) memory block or a multi-level cell (MLC) memory block.
5 . The method of claim 1 , further comprising marking the memory block as a failed memory block in response to determining the number of memory cells in the first state exceeds the second state threshold.
6 . The method of claim 1 , wherein the P/E cycle threshold is based, at least in part, on an age of the memory block.
7 . The method of claim 1 , wherein determining whether each memory cell associated with the first wordline is in a first state or a second state is based, at least in part, on information received from a read command executed on the memory block.
8 . A data storage device, comprising:
a controller; and
a memory block failure anticipation system associated with the controller and operable to:
initiate an erase operation on a selected memory block;
determine whether a program/erase (P/E) cycle count for the selected memory block exceeds a P/E cycle threshold;
in response to a determination that the P/E cycle count for the selected memory block exceeds the P/E cycle threshold:
determine whether each memory cell associated with a first wordline of the selected memory block is in a first state;
determine whether a number of memory cells associated with the first wordline of the selected memory block in the first state exceeds a first state threshold;
in response to a determination that the number of memory cells associated with the first wordline of the selected memory block in the first state exceeds the first state threshold, mark the selected memory block as a failed memory block;
in response to a determination that the number of memory cells associated with the first wordline of the selected memory block in the first state is less than the first state threshold, determine whether the number of memory cells associated with the first wordline of the selected memory block in the first state exceeds a second state threshold; and
in response to a determination that the number of memory cells associated with the first wordline of the selected memory block in the first state exceeds the second state threshold, mark the first wordline as a failed wordline.
9 . The data storage device of claim 8 , wherein the memory block failure anticipation system executes a read operation on the first wordline of the selected memory block to determine whether each memory cell associated with the first wordline of the selected memory block is in the first state.
10 . The data storage device of claim 8 , wherein the memory block failure anticipation system is further operable to:
determine whether each memory cell associated with a second wordline of the selected memory block is in the first state;
determine whether a number of memory cells associated with the second wordline in the first state and the number of memory cells associated with the first wordline in the first state exceeds the first state threshold; and
in response to a determination that the number of memory cells associated with the second wordline in the first state and the number of memory cells associated with the first wordline in the first state exceeds the first state threshold, mark the selected memory block as a failed memory block.
11 . The data storage device of claim 10 , wherein the memory block failure anticipation system is further operable to:
determine whether the number of memory cells associated with the second wordline in the first state exceeds the second state threshold; and
in response to a determination that the number of memory cells associated with the second wordline in the first state exceeds the second state threshold, mark the second wordline as a failed wordline.
12 . The data storage device of claim 11 , wherein the memory block failure anticipation system determines whether the number of memory cells associated with the second wordline in the first state exceeds the second state threshold in response to determining the number of memory cells associated with the second wordline in the first state and the number of memory cells associated with the first wordline in the first state is less than the first state threshold.
13 . The data storage device of claim 8 , wherein the P/E cycle threshold is based, at least in part, on an age of at least one of the selected memory block and the data storage device.
14 . The data storage device of claim 8 , wherein the memory block failure anticipation system executed a read command on the selected memory block to determine whether each memory cell associated with the first wordline is in the first state.
15 . A data storage device, comprising:
means for determining whether a program/erase (P/E) cycle count for a memory block selected for an erase operation exceeds a P/E cycle threshold;
means for determining whether each memory cell associated with a first wordline of the selected memory block is in a first state;
means for determining whether a number of memory cells associated with the first wordline of the selected memory block in the first state exceeds a first state threshold;
means for marking the selected memory block as a failed memory block in response to a determination that the P/E cycle count for the selected memory block exceeds the P/E cycle threshold;
means for determining whether the number of memory cells associated with the first wordline of the selected memory block in the first state exceeds a second state threshold; and
means for marking the first wordline as a failed wordline in response to a determination that the number of memory cells associated with the first wordline of the selected memory block in the first state exceeds the second state threshold.
16 . The data storage device of claim 15 , further comprising:
means for determining whether each memory cell associated with a second wordline of the selected memory block is in the first state;
means for determining whether a number of memory cells associated with the second wordline in the first state and the number of memory cells associated with the first wordline in the first state exceeds the first state threshold; and
means for marking the selected memory block as a failed memory block in response to a determination that the number of memory cells associated with the second wordline in the first state and the number of memory cells associated with the first wordline in the first state exceeds the first state threshold.
17 . The data storage device of claim 16 , further comprising:
means for determining whether the number of memory cells associated with the second wordline in the first state exceeds the second state threshold; and
means for marking the second wordline as a failed wordline in response to a determination that the number of memory cells associated with the second wordline in the first state exceeds the second state threshold.
18 . The data storage device of claim 17 , wherein the means for determining whether the number of memory cells associated with the second wordline in the first state exceeds the second state threshold makes the determination in response to a determination that the number of memory cells associated with the second wordline in the first state and the number of memory cells associated with the first wordline in the first state is less than the first state threshold.
19 . The data storage device of claim 15 , wherein the P/E cycle threshold is based, at least in part, on an age of at least one of a selected memory block and the data storage device.
20 . The data storage device of claim 15 , wherein the memory block is selected from a pool of free memory blocks.