IP Library Granted Patent US 12706247
Granted Patent B2
US 12706247 · App. 18/317,541 · Granted Aug 11, 2026

Component configured with intrinsic shielding and process of implementing the same

Inventor: Gérard Bouisse (Saint-Lys, FR)
Assignee: Macom Technology Solutions Holdings, Inc.
H01G4/012H01G4/232
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Quick Facts
Patent No.
US 12706247
App. No.
18/317,541
Granted
Aug 11, 2026
Kind
B2
Abstract

A shielded capacitor includes a first terminal; one or more first capacitor metals electrically connected to the first terminal; a second terminal; one or more second capacitor metals electrically connected to the second terminal. The shielded capacitor further includes a shielding structure. The shielding structure being configured to limit a variation of an RF characteristic due to a presence of a metallic structure.

Claims (44)

1 . A shielded capacitor comprising:

a first terminal;

one or more first capacitor metals electrically connected to the first terminal;

a second terminal;

one or more second capacitor metals electrically connected to the second terminal;

a shielding structure;

the shielding structure being configured to limit a variation of an RF characteristic due to a presence of a metallic structure; and

a dielectric material located below the shielding structure,

wherein the shielding structure extends laterally at least a distance of 50%-80%, between side edges of the shielded capacitor.

2 . The shielded capacitor according to claim 1 wherein the shielding structure is arranged on and/or within a surface of the shielded capacitor adjacent the metallic structure.

3 . The shielded capacitor according to claim 1 wherein the shielding structure comprises a metal layer, a sputtered metal layer, a plurality of metal layers, and/or a plurality of sputtered metal layers.

4 . The shielded capacitor according to claim 1 wherein the shielding structure comprises a sputtered metal layer; and wherein the shielding structure is arranged on and/or within a surface of the shielded capacitor adjacent the metallic structure.

5 . The shielded capacitor according to claim 1 wherein the shielding structure is arranged within and/or adjacent an upper surface of the shielded capacitor.

6 . The shielded capacitor according to claim 1 wherein the shielding structure is configured to be electrically isolated from the first terminal and/or the second terminal.

7 . The shielded capacitor according to claim 1 wherein the shielding structure is configured to be electrically connected to the first terminal; and wherein the shielding structure is arranged on and/or within a surface of the shielded capacitor adjacent the metallic structure.

8 . The shielded capacitor according to claim 1 wherein the shielding structure comprises a first end and a second end; and wherein the shielding structure is arranged on and/or within a surface of the shielded capacitor adjacent the metallic structure.

9 . The shielded capacitor according to claim 8 wherein the first end is electrically connected to the first terminal.

10 . The shielded capacitor according to claim 1 wherein the one or more first capacitor metals comprises a first lower capacitor metal and a first upper capacitor metal, with the dielectric material arranged therebetween; and wherein the one or more second capacitor metals comprises a second lower capacitor metal and a second upper capacitor metal; and wherein the shielding structure is arranged on and/or within a surface of the shielded capacitor adjacent the metallic structure.

11 . The shielded capacitor according to claim 1 wherein the shielding structure is electrically connected to the first terminal; wherein the shielding structure is isolated from the second terminal; and wherein the shielding structure is arranged on and/or within a surface of the shielded capacitor adjacent the metallic structure.

12 . The shielded capacitor according to claim 10 wherein the first upper capacitor metal is configured as the shielding structure.

13 . The shielded capacitor according to claim 10 wherein the first capacitor metal and the first upper capacitor metal are arranged vertically above the second upper capacitor metal.

14 . The shielded capacitor according to claim 1 wherein two vertically uppermost implementations of the one or more first capacitor metals are connected to the first terminal.

15 . The shielded capacitor according to claim 1 wherein the shielded capacitor comprises a multilayer capacitor, a ceramic capacitor, and/or a multilayer ceramic capacitor.

16 . The shielded capacitor according to claim 1 wherein the shielding structure is arranged on a plurality surfaces of the shielded capacitor including a surface adjacent the metallic structure.

17 . The shielded capacitor according to claim 16 wherein the shielding structure is electrically connected to a substrate.

18 . The shielded capacitor according to claim 1 wherein the shielding structure is arranged on a top surface, a bottom surface, and side surfaces of the shielded capacitor.

19 . The shielded capacitor according to claim 1 wherein the shielded capacitor is configured as a surface mount device (SMD).

20 . A device comprising the shielded capacitor according to claim 1 and further comprising the metallic structure.

21 . The device according to claim 20 wherein the device comprises an RF device, an RF power device, an RF power amplifier, a flip chip RF device, a flip chip RF power device, a flip chip RF power amplifier, a flip chip power amplifier, a low noise amplifier, a filter, and/or a mixer.

22 . The device according to claim 20 wherein the device comprises a package and/or a packaged implementation of an RF device, an RF power device, an RF power amplifier, a flip chip RF device, a flip chip RF power device, a flip chip RF power amplifier, a flip chip power amplifier, a low noise amplifier, a filter, and/or a mixer.

23 . The device according to claim 20 wherein the metallic structure comprises a cooling device, a topside cooling device, a heat sink, a topside heat sink, a support, a surface, a package support, a package surface, a package support surface, a flange, a metal flange, a leadframe, a metal leadframe, a coin, and/or a copper coin.

24 . The device according to claim 20 further comprising a substrate and the shielded capacitor is mounted to the substrate, wherein the substrate comprises a circuit board, a printed circuit board (PCB), a printed wiring board (PWB), and/or an IPD (integrated passive device) substrate.

25 . The device according to claim 24 wherein the substrate comprises a first terminal and a second terminal, wherein the first terminal of the shielded capacitor is connected to the first terminal of the substrate; and wherein the second terminal of the shielded capacitor is connected to the second terminal of the substrate.

26 . The device according to claim 20 further comprising support stands configured to support the metallic structure.

27 . A shielded capacitor comprising:

a first terminal;

one or more first capacitor metals electrically connected to the first terminal;

a second terminal;

one or more second capacitor metals electrically connected to the second terminal;

a shielding structure;

the shielding structure being configured to limit a variation of an RF characteristic due to a presence of a metallic structure,

wherein the shielding structure comprises a first end and a second end; and wherein the shielding structure is arranged on and/or within a surface of the shielded capacitor adjacent the metallic structure;

wherein the first end and the second end are electrically isolated from the first terminal and the second terminal; and

wherein the shielding structure extends laterally at least a distance of 50%-80%, between side edges of the shielded capacitor.