Shielded socket pin for device-to-device connection
Examples described herein relate to a system that includes: a first signal pin and a first ground pin adjacent to the first signal pin. In some examples, the first signal pin comprises a first portion, a second portion, and a third portion. In some examples, the first ground pin comprises a first portion, a second portion, and a third portion, the second portion of the first signal pin comprises a vertical mount, the second portion of the first ground pin comprises a vertical mount, and the second portion of the first signal pin and the second portion of the first ground pin are arranged proximate one another.
1 . An apparatus comprising:
a first signal pin and
a first ground pin adjacent to the first signal pin, wherein:
the first signal pin comprises a first portion, a second portion, and a third portion,
the first ground pin comprises a first portion, a second portion, and a third portion,
the second portion of the first signal pin comprises a vertical mount and a cantilever mount segment,
the second portion of the first ground pin comprises a vertical mount and a cantilever mount segment,
the cantilever mount segment of the first signal pin and the cantilever mount segment of the first ground pin are arranged proximate, adjacent, and mirror one another,
the first portion of the first signal pin comprises a soldering portion, and
the third portion of the first signal pin comprises spring load.
2 . The apparatus of claim 1 , wherein the first portion of the first ground pin is coupled to a ball grid array (BGA) solder mount pad of a motherboard.
3 . The apparatus of claim 1 , wherein the third portion of the first ground pin is coupled to a landing pad of a processor package.
4 . The apparatus of claim 1 , wherein the second portion of the first ground pin is to provide stability and rigidity for the first ground pin.
5 . The apparatus of claim 1 , wherein the second portion of the first ground pin and the second portion of the first signal pin are adjacent to one another and the first ground pin and the first signal pin are arranged in a line.
6 . The apparatus of claim 1 , wherein the second portion of the first ground pin and the second portion of the first signal pin comprise one or more of: copper, bronze, or an alloy.
7 . The apparatus of claim 1 , comprising:
a second signal pin and
a second ground pin adjacent to the second signal pin, wherein:
the second signal pin comprises a first portion, a second portion, and a third portion,
the second ground pin comprises a first portion, a second portion, and a third portion,
the second portion of the second signal pin comprises a vertical mount,
the second portion of the second ground pin comprises a vertical mount, and
the second portion of the second signal pin and the second portion of the second ground pin are arranged proximate one another.
8 . The apparatus of claim 7 , further comprising a first device and a second device, wherein
the first device comprises a motherboard and at least one solder mount pad for a ball grid array (BGA) coupled to the motherboard,
the first portion of the first ground pin is coupled to the at least one solder mount pad,
the second device comprises at least one processor package and at least one processor package landing pad coupled to the at least one processor package, and
the third portion of the second ground pin is coupled to the at least one processor package landing pad.
9 . The apparatus of claim 8 , wherein the at least one processor package comprises one or more of: central processing unit (CPU), XPU, and/or graphics processing unit (GPU).
10 . A system comprising:
a first device comprising a motherboard;
a second device comprising a processor package; and
an arrangement of a pair of a signal pin and a ground pin coupled to the motherboard and the processor package, wherein:
the signal pin comprises a first portion, a second portion, and a third portion,
the ground pin comprises a first portion, a second portion, and a third portion,
the second portion of the signal pin comprises a vertical mount and a cantilever mount segment,
the second portion of the ground pin comprises a vertical mount and a cantilever mount segment,
the cantilever mount segment of the signal pin and the cantilever mount segment of the ground pin are arranged proximate, adjacent, and mirror one another,
the first portion of the signal pin comprises a soldering portion, and the third portion of the signal pin comprises spring load.
11 . The system of claim 10 , wherein the signal pin and the ground pin comprise one or more of: copper, bronze, or an alloy.
12 . The system of claim 10 , wherein:
the signal pin comprises a first portion, a second portion, and a third portion,
the ground pin comprises a first portion, a second portion, and a third portion,
the second portion of the signal pin comprises a first vertical mount,
the second portion of the ground pin comprises a second vertical mount, and
the second portion of the signal pin and the second portion of the ground pin are arranged proximate one another.
13 . The system of claim 10 , comprising:
a second signal pin and
a second ground pin adjacent to the second signal pin, wherein:
the second signal pin comprises a first portion, a second portion, and a third portion,
the second ground pin comprises a first portion, a second portion, and a third portion,
the second portion of the second signal pin comprises a vertical mount,
the second portion of the second ground pin comprises a vertical mount, and
the second portion of the second signal pin and the second portion of the second ground pin are arranged proximate one another.
14 . The system of claim 10 , comprising a processor, wherein the signal pin and ground pin pair couple the processor package to the motherboard.
15 . The system of claim 14 , wherein the processor comprises one or more of: a central processing unit (CPU), XPU, accelerator, and/or graphics processing unit (GPU).
16 . The system of claim 10 , comprising a memory device coupled to the processor package via the motherboard.
17 . The apparatus of claim 1 , wherein the vertical mount of the first signal pin and the vertical mount of the first ground pin are facing opposite directions.