Charging circuit and terminal device

1 . A charging circuit, comprising:

a charging interface;

a charging management circuit; and

a cell;

wherein the charging management circuit is connected to the charging interface and is configured to step down a charging voltage inputted from the charging interface to obtain an output voltage, and increase a charging current inputted from the charging interface to obtain a total output current, wherein the output voltage is 1/N times the charging voltage, the total output current is N times the charging current, and N is a positive integer greater than 2;

wherein the charging management circuit is further connected to the cell and is configured to input the output voltage and the total output current to the cell to charge the cell;

wherein a product of a maximum charging voltage and a maximum charging current that are inputted from the charging interface is greater than 50 W;

wherein the cell comprises M tab groups, wherein each tab group of the M tab groups comprises a positive tab and a negative tab, and wherein M is a positive integer greater than 1;

wherein a specified voltage inputted to each tab group of the M tab groups is equal to the output voltage, and a specified current inputted to each tab group of the M tab groups is the total output current divided by M;

wherein the cell further comprises a cell body, a first set of tab groups of the M tab groups is located on a first side of the cell body, a second set of tab groups of the M tab groups is located on a second side of the cell body, and the first side and the second side are opposite sides of the cell body; and

wherein the first side and the second side of the cell body both comprise at least one tab group.

2 . The charging circuit according to claim 1 , wherein the maximum charging voltage is greater than 10 V, the maximum charging current is 5 A, a maximum specified voltage allowed to be inputted to each tab group of the M tab groups is 5 V, and a maximum specified current allowed to be inputted to each tab group of the M tab groups is 10 A.

3 . The charging circuit according to claim 1 , wherein the first side and the second side of the cell body both comprise one tab group.

4 . The charging circuit according to claim 1 , wherein the first side and the second side of the cell body both comprise two tab groups, with the two tab groups located on the first side sharing one positive tab or one negative tab and the two tab groups located on the second side sharing one positive tab or one negative tab.

5 . The charging circuit according to claim 1 ,

wherein the charging management circuit comprises a first charging management chip, and the first charging management chip is connected to at least one tab group of the M tab groups.

6 . The charging circuit according to claim 5 , wherein the charging management circuit comprises a plurality of first charging management chips, wherein a quantity of first charging management chips in the plurality of first charging management chips is equal to a quantity of sides on which the tab groups of the cell are distributed.

7 . The charging circuit according to claim 5 ,

wherein the first charging management chip comprises a first control circuit, a second control circuit, and N first storage circuits;

wherein the first control circuit is connected to a first control signal end and the N first storage circuits and is configured to be closed under an action of a first control signal inputted from the first control signal end to connect the N first storage circuits in series;

wherein the second control circuit is connected to a second control signal end and the N first storage circuits and is configured to be closed under an action of a second control signal inputted from the second control signal end to connect the N first storage circuits in parallel; and

wherein the first control signal and the second control signal are phase inversion signals.

8 . The charging circuit according to claim 7 ,

wherein the first control circuit comprises N first switch components, and all the first switch components except a 1 st first switch component are connected between two adjacent first storage circuits, wherein an input terminal of the 1 st first switch component is connected to the charging interface, and an output terminal of the 1 st first switch component is connected to a first terminal of a 1 st first storage circuit;

wherein the second control circuit comprises N−1 switch units, and the switch units each comprise two second switch components, wherein an input terminal of a 1 st second switch component is connected to a first terminal of the first storage circuit, an output terminal of the 1 st second switch component is connected to an output terminal of the first charging management chip, an input terminal of a 2 nd second switch component is connected to a second terminal of the first storage circuit, and an output terminal of the 2 nd second switch component is connected to a ground terminal;

wherein a first terminal of an N th first storage circuit of the N first storage circuits is connected to the output terminal of the first charging management chip, and a second terminal of the N th first storage circuit of the N first storage circuits is connected to the ground terminal; and

wherein the N first storage circuits each comprise a first storage capacitor, and the first switch components and the second switch components are switch transistors with a body diode.

9 . The charging circuit according to claim 1 , wherein the charging management circuit comprises a first charging management unit comprising two second charging management chips connected in series, and the two second charging management chips connected in series are respectively a first management chip and a second management chip, wherein N equals 4;

wherein an input terminal of the first management chip is connected to the charging interface, an output terminal of the first management chip is connected to an input terminal of the second management chip, and an output terminal of the second management chip is connected to the first set of tab groups of the M tab groups that is located on the first side of the cell body; and

wherein a transition voltage resulting from stepping down the charging voltage by the first management chip is half the charging voltage, and the output voltage resulting from stepping down the transition voltage by the second management chip is half the transition voltage.

10 . The charging circuit according to claim 9 , wherein the charging management circuit further comprises a second charging management unit connected in parallel with the first charging management unit, and the output terminal of the second management chip of the second charging management unit is connected to the second set of tab groups of the M tab groups that is located on the second side of the cell body.

11 . The charging circuit according to claim 9 ,

wherein each of the two second charging management chips comprises a third control circuit, a fourth control circuit, and two second storage circuits;

wherein the third control circuit is connected to a third control signal end and the two second storage circuits and is configured to be closed under an action of a third control signal inputted from the third control signal end to connect the two second storage circuits in series;

wherein the fourth control circuit is connected to a fourth control signal end and the two second storage circuits and is configured to be closed under an action of a fourth control signal inputted from the fourth control signal end to connect the two second storage circuits in parallel; and

wherein the third control signal and the fourth control signal are phase inversion signals.

12 . The charging circuit according to claim 11 ,

wherein the third control circuit comprises two third switch components, an input terminal of a 1 st third switch component is connected to the charging interface, an output terminal of the 1 st third switch component is connected to a first terminal of a 1 st second storage circuit, an input terminal of a 2 nd third switch component is connected to a second terminal of the 1 st second storage circuit, an output terminal of the 2 nd third switch component is connected to a first terminal of a 2 nd second storage circuit and an output terminal of the second charging management chip, and a second terminal of the 2 nd second storage circuit is connected to a ground terminal;

wherein the fourth control circuit comprises two fourth switch components, an input terminal of a 1 st fourth switch component is connected to the first terminal of the 1 st second storage circuit, an output terminal of the 1 st fourth switch component is connected to the output terminal of the second charging management chip, an input terminal of a 2 nd fourth switch component is connected to the second terminal of the 1 st second storage circuit, and an output terminal of the 2 nd fourth switch component is connected to the ground terminal; and

wherein the second storage circuits each comprise a second storage capacitor, and the third switch components and the fourth switch components are switch transistors with a body diode.

13 . The charging circuit according to claim 2 , wherein the maximum charging voltage is 20 V, wherein N equals 4, and wherein M is 2 or 4.

14 . A terminal device, comprising:

a main board;

a micro board;

a connecting circuit board;

a battery protection board; and

a charging circuit comprising a charging interface, a charging management circuit, and a cell;

wherein the charging management circuit is connected to the charging interface and is configured to step down a charging voltage inputted from the charging interface to obtain an output voltage, and increase a charging current inputted from the charging interface to obtain a total output current, wherein the output voltage is 1/N times the charging voltage, the total output current is N times the charging current, and N is a positive integer greater than 2;

wherein the charging management circuit is further connected to the cell and is configured to input the output voltage and the total output current to the cell to charge the cell;

wherein a product of a maximum charging voltage and a maximum charging current that are inputted from the charging interface is greater than 50 W;

wherein the charging interface is located on the micro board, one end of the connecting circuit board is connected to the micro board, the other end of the connecting circuit board is connected to the main board, at least one charging management chip in the charging management circuit is located on the main board, and the charging management circuit is connected to tab groups of the cell via the battery protection board;

wherein the cell comprises M tab groups, wherein each tab group of the M tab groups comprises a positive tab and a negative tab, and wherein M is a positive integer greater than 1;

wherein a specified voltage inputted to each tab group of the M tab groups is equal to the output voltage, and a specified current inputted to each tab group of the M tab groups is the total output current divided by M;

wherein the cell further comprises a cell body, a first set of tab groups of the M tab groups is located on a first side of the cell body, a second set of tab groups of the M tab groups is located on a second side of the cell body, and the first side and the second side are opposite sides of the cell body; and

wherein the first side and the second side of the cell body both comprise at least one tab group.

15 . The terminal device according to claim 14 , wherein the maximum charging voltage is greater than 10 V, the maximum charging current is 5 A, a maximum specified voltage allowed to be inputted to each tab group of the M tab groups is 5 V, and a maximum specified current allowed to be inputted to each tab group of the M tab groups is 10 A.

16 . The terminal device according to claim 15 , wherein the maximum charging voltage is 20 V, wherein N equals 4, and wherein M is 2 or 4.

17 . The terminal device according to claim 14 ,

wherein the charging management circuit comprises a first charging management chip, and the first charging management chip is connected to at least one tab group of the M tab groups.

18 . The terminal device according to claim 17 , wherein the charging management circuit comprises a plurality of first charging management chips, wherein a quantity of first charging management chips in the plurality of first charging management chips is equal to a quantity of sides on which the tab groups of the cell are distributed.

19 . The terminal device according to claim 17 ,

wherein the first charging management chip comprises a first control circuit, a second control circuit, and N first storage circuits;

wherein the first control circuit is connected to a first control signal end and the N first storage circuits and is configured to be closed under an action of a first control signal inputted from the first control signal end to connect the N first storage circuits in series;

wherein the second control circuit is connected to a second control signal end and the N first storage circuits and is configured to be closed under an action of a second control signal inputted from the second control signal end to connect the N first storage circuits in parallel; and

wherein the first control signal and the second control signal are phase inversion signals.

20 . The terminal device according to claim 19 ,

wherein the first control circuit comprises N first switch components, and all the first switch components except a 1 st first switch component are connected between two adjacent first storage circuits, wherein an input terminal of the 1 st first switch component is connected to the charging interface, and an output terminal of the 1 st first switch component is connected to a first terminal of a 1 st first storage circuit;

wherein the second control circuit comprises N−1 switch units, and the switch units each comprise two second switch components, wherein an input terminal of a 1 st second switch component is connected to a first terminal of the first storage circuit, an output terminal of the 1 st second switch component is connected to an output terminal of the first charging management chip, an input terminal of a 2 nd second switch component is connected to a second terminal of the first storage circuit, and an output terminal of the 2 nd second switch component is connected to a ground terminal;

wherein a first terminal of an N th first storage circuit of the N first storage circuits is connected to the output terminal of the first charging management chip, and a second terminal of the N th first storage circuit of the N first storage circuits is connected to the ground terminal; and

wherein the N first storage circuits each comprise a first storage capacitor, and the first switch components and the second switch components are switch transistors with a body diode.