IP Library Granted Patent US 12706523
Granted Patent B2
US 12706523 · App. 18/545,019 · Granted Aug 11, 2026

Adaptive gate voltage adjustment

Inventors: Rahul Ramesh (Cary, NC); Yen-Mo Chen (Morrisville, NC); Sungkeun Lim (Apex, NC)
Assignee: Renesas Electronics America Inc.
H02M1/08H02M1/0009H02M1/0045H02M3/158
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Quick Facts
Patent No.
US 12706523
App. No.
18/545,019
Filed
Dec 19, 2023
Granted
Aug 11, 2026
Kind
B2
Art Unit
2838
USPC
323/271
Abstract

Systems and methods for method for operating a switching converter are described. A controller can sense a load current associated with an output voltage of a power stage. The controller can, based on the sensed load current, define a gate voltage at one of a default voltage level and a modified voltage level. The gate voltage can be for driving the power stage.

Claims (51)

1 . A semiconductor device comprising:

a circuit configured to define a gate voltage for driving a power stage; and

a controller configured to:

sense a load current being outputted by the power stage;

compare the sensed load current with a predefined load current, wherein:

the predefined load current corresponds to an overlap between a first efficiency of the power stage associated with a default voltage level and a second efficiency of the power stage associated with a modified voltage level; or

the predefined load current corresponds to a transition between a continuous conduction mode (CCM) and a discontinuous conduction mode (DCM) of the power stage; and

based on the comparison between the sensed load current and the predefined load current, control the circuit to define the gate voltage at one of the default voltage level and the modified voltage level.

2 . The semiconductor device of claim 1 , wherein the default voltage level is lower than the modified voltage level.

3 . The semiconductor device of claim 1 , wherein the default voltage level is higher than the modified voltage level.

4 . The semiconductor device of claim 1 , wherein the default voltage level is lower than the modified voltage level, and the controller is configured to:

determine the sensed load current is greater than the predefined load current; and

in response to determination that the sensed load current is greater than the predefined load current, enable the circuit to increase the gate voltage from the default voltage level to the modified voltage level.

5 . The semiconductor device of claim 4 , wherein the controller is configured to:

determine the sensed load current is less than the predefined load current when the circuit is enabled; and

in response to the determination that the sensed load current is less than the predefined load current when the circuit is enabled, disable the circuit to prevent modification to the default voltage level.

6 . The semiconductor device of claim 1 , wherein the default voltage level is lower than the modified voltage level, and the circuit comprises:

a low-dropout (LDO) regulator configured to generate a voltage signal having the default voltage level; and

a voltage doubler configured to modify the voltage signal by doubling the default voltage level.

7 . A system comprising:

a power stage configured to convert an input voltage into an output voltage;

a driver circuit configured to output a gate voltage to drive the power stage; and

a controller configured to:

sense a load current associated with the output voltage;

compare the sensed load current with a predefined load current, wherein:

the predefined load current corresponds to an overlap between a first efficiency of the power stage associated with a default voltage level and a second efficiency of the power stage associated with a modified voltage level; or

the predefined load current corresponds to a transition between a continuous conduction mode (CCM) and a discontinuous conduction mode (DCM) of the power stage; and

based on the comparison between the sensed load current and the predefined load current, define the gate voltage at one of the default voltage level and the modified voltage level.

8 . The system of claim 7 , wherein the default voltage level is lower than the modified voltage level.

9 . The system of claim 7 , wherein the default voltage level is higher than the modified voltage level.

10 . The system of claim 7 , wherein the default voltage level is lower than the modified voltage level, and the controller is configured to:

determine the sensed load current is greater than a predefined load current; and

in response to determination that the sensed load current is greater than the predefined load current, increase the gate voltage from the default voltage level to the modified voltage level.

11 . The system of claim 10 , wherein the controller is configured to:

determine the sensed load current is less than the predefined load current when a circuit is enabled; and

in response to determination that the sensed load current is less than the predefined load current when the circuit is enabled, disable the circuit to prevent modification to the default voltage level.

12 . The system of claim 7 , wherein the default voltage level is lower than the modified voltage level, and the controller further comprises:

a low-dropout (LDO) regulator configured to generate a voltage signal having the default voltage level; and

a voltage doubler configured to modify the voltage signal by doubling the default voltage level.

13 . A method for operating a switching converter, the method comprising:

sensing a load current associated with an output voltage of a power stage;

comparing the sensed load current with a predefined load current, wherein:

the predefined load current corresponds to an overlap between a first efficiency of the power stage associated with a default voltage level and a second efficiency of the power stage associated with a modified voltage level; or

the predefined load current corresponds to a transition between a continuous conduction mode (CCM) and a discontinuous conduction mode (DCM) of the power stage; and

based on the comparison between the sensed load current and the predefined load current, defining a gate voltage at one of the default voltage level and the modified voltage level, wherein the gate voltage is for driving the power stage.

14 . The method of claim 13 , wherein the default voltage level is lower than the modified voltage level, and the method further comprises:

determining the sensed load current is greater than a predefined load current; and

in response to determination that the sensed load current is greater than the predefined load current, increasing the default voltage level to the modified voltage level.

15 . The method of claim 13 , further comprising:

determining the sensed load current is less than a predefined load current; and

in response to determination that the sensed load current is less than the predefined load current, maintaining the default voltage level.