Flying-capacitor multi-level bridgeless totem-pole boost PFC converters with reduced zero-crossing distortion of line current
In one embodiment, a multi-level, bridgeless boost power factor correction (PFC) device, comprising: a circuit comprising an inductor, and at least a first pair and a second pair of switches and a capacitor arranged in a flying capacitor, totem-pole configuration; and a control circuit configured to drive the at least first and second pairs of switches in such a way as to reduce distortion in a line current, wherein for the first and second pairs of switches, the control circuit is configured to: for a first half line cycle, drive a first switch of each pair during an entire interval of the first half-line cycle and a second switch of each pair for less than the entire interval; and for a second half-line cycle, drive the first switch of each pair for less than an entire interval of the second half-line cycle and the second switch of each pair during an entire interval of the second half-line cycle.
1 . A multi-level bridgeless boost power factor correction (PFC) device, comprising:
an inductor configured to electrically connect to an AC source providing a line voltage;
a first set of switches, comprising two or more switches arranged in series, configured to be electrically connected to a terminal of the inductor at one end and to a negative output terminal at an opposite end;
a second set of switches, comprising two or more switches arranged in series, configured to be electrically connected to the terminal of the inductor at one end and to a positive output terminal at an opposite end, wherein an output voltage of the multi-level bridgeless boost PFC converter is between the positive output terminal and the negative output terminal;
one or more flying capacitors, wherein each of the one or more flying capacitors is connected between different pairs of adjacent ones of the first set of switches and corresponding adjacent ones of the second set of switches; and
a control circuit configured to:
for a positive half-line cycle, drive the first set of switches to operate as boost switches and drive the second set of switches to operate as synchronous rectifier switches; and
for a negative half-line cycle, drive the second set of switches to operate as boost switches and drive the first set of switches to operate as synchronous rectifier switches;
wherein the control circuit is further configured to drive the first set of switches and the second set of switches in such a way as to reduce a line current distortion around zero-crossings of the line voltage;
wherein for every half-line cycle, the control circuit is configured to drive the boost switches for an entire half-line cycle and drive the synchronous rectifier switches for less than the entire half-line cycle.
2 . The multi-level bridgeless boost PFC converter of claim 1 , the control circuit is further configured to, for every half-line cycle, disable the synchronous rectifier switches for a first interval at a zero-crossing of the line voltage at the start of the half-line cycle and for a second interval at the zero-crossing of the line voltage at end of the half-line cycle.
3 . The multi-level bridgeless boost PFC converter of claim 2 , the control circuit is further configured to increase the first interval and the second interval as a load connected between the positive output terminal and the negative output terminal decreases.
4 . The multi-level bridgeless boost PFC converter of claim 3 , the control circuit is further configured to increase the first interval and the second interval to the entire half-line cycle when a load condition is lower than a preset percentage.
5 . The multi-level bridgeless boost PFC converter of claim 1 , wherein the control circuit is configured to operate the multi-level bridgeless boost PFC converter in a continuous conduction mode and multiple different discontinuous conduction modes.
6 . A multi-level bridgeless boost power factor correction (PFC) device, comprising:
an inductor configured to electrically connect to an AC source providing a line voltage;
a first set of switches, comprising two or more switches arranged in series, configured to be electrically connected to a terminal of the inductor at one end and to a negative output terminal at an opposite end;
a second set of switches, comprising two or more switches arranged in series, configured to be electrically connected to the terminal of the inductor at one end and to a positive output terminal at an opposite end, wherein an output voltage of the multi-level bridgeless boost PFC converter is between the positive output terminal and the negative output terminal;
one or more flying capacitors, wherein each of the one or more flying capacitors is connected between different pairs of adjacent ones of the first set of switches and corresponding adjacent ones of the second set of switches;
a pair of slow leg synchronous rectifier switches connected in series, where a common terminal of the slow leg synchronous rectifier switches is connected to the AC source, a top terminal of an upper slow leg synchronous rectifier switch is connected to the positive output terminal and a bottom terminal of a bottom slow leg synchronous rectifier is connected to the negative output terminal; and
a control circuit configured to:
for a positive half-line cycle, drive the first set of switches to operate as boost switches, drive the second set of switches to operate as synchronous rectifier switches, and enable the bottom slow leg synchronous rectifier switches and disable the upper slow leg synchronous rectifier switches; and
for a negative half-line cycle, drive the second set of switches to operate as boost switches, drive the first set of switches to operate as synchronous rectifier switches, and enable the upper slow leg synchronous rectifier switches and disable the bottom slow leg synchronous rectifier switches;
wherein the control circuit is further configured to:
disable the boost switches, the synchronous rectifier switches and the slow leg synchronous rectifier switches before and after a zero-crossing of the line voltage as to reduce a line current distortion around zero-crossings of the line voltage.
7 . The multi-level bridgeless boost PFC device of claim 6 , wherein the control circuit is configured to disable the boost switches, the synchronous rectifier switches and the slow leg synchronous rectifier switches by blanking corresponding gate-drive pulses during intervals on each side of the zero-crossing of the line voltage.
8 . The multi-level bridgeless boost PFC device of claim 7 , wherein the intervals of the blanking are the same for the boost switches, the synchronous rectifier switches and the slow leg synchronous rectifier switches.
9 . The multi-level bridgeless boost PFC device of claim 7 , wherein the intervals of the blanking are different among the boost switches, the synchronous rectifier switches and the slow leg synchronous rectifier switches.
10 . The multi-level bridgeless boost PFC device of claim 9 , wherein the intervals of the blanking of the slow leg synchronous rectifier switches are smaller than those of the synchronous rectifier switches and are larger than those of the boost switches.
11 . The multi-level bridgeless boost PFC device of claim 7 , wherein the intervals of the blanking before a zero-crossing point of the line voltage are different from the intervals of the blanking after the zero-crossing point of the line voltage.
12 . The multi-level bridgeless boost PFC device of claim 7 , wherein the control circuit is further configured to provide soft start pulses for the boost switches using open loop control while disabling the corresponding gate-drive pulses that are based on closed loop control, and the soft start pulses for the boost switches are provided at end of the intervals of the blanking of the boost switches, wherein upon end of providing the soft start pulses for the boost switches, the control circuit is further configured to activate one of the slow leg synchronous rectifier switches, followed by activation of the synchronous rectifier switches after a delay time.
13 . The multi-level bridgeless boost PFC device of claim 12 , wherein the soft start pulses for different boost switches are of the same phase.
14 . The multi-level bridgeless boost PFC device of claim 6 , the control circuit further comprises a feedforward control component configured to provide pre-calculated values for duty cycle for continuous conduction mode and multiple different discontinuous conduction modes to control the first set of switches and the second set of switches.
15 . The multi-level bridgeless boost PFC device of claim 14 , wherein the control circuit is configured to switch among the continuous conduction mode and the multiple different discontinuous conduction modes during an entire half-line cycle between zero-crossings of the line voltage, and the control circuit is configured to select either the continuous conduction mode or one of the multiple discontinuous conduction modes based on a lowest value of the duty cycle.
16 . The multi-level bridgeless boost PFC device of claim 14 , wherein the pre-calculated values for the duty cycle for the multiple discontinuous conduction modes are based on multiple different calculations that are dependent on a comparison between the line voltage and the output voltage.