Multi-mode power stage architecture for pulse width modulation controller
A driving power stage can receive a PWM signal from the PWM controller and output a PWM signal to a secondary power stage. The secondary power stage can be turned off by the driving power stage during a light-load mode. For a single-phase application, the driving power stage can turn off a switch, causing the power stage to work as a regular power stage. Various other methods and systems are also disclosed.
1 . A device comprising:
a primary power stage circuit comprising:
a Pulse-Width Modulation (PWM) input interface;
a control circuitry configured to:
receive a PWM input signal from the PWM input interface; and
generate, in response to a first mode indicated by a mode indicator, a first modified PWM signal and a second modified PWM signal by dividing the PWM input signal;
a voltage regulation circuitry that regulates a voltage to a target device based on the first modified PWM signal;
a PWM output interface; and
a switching component configured to transmit the second modified PWM signal to the PWM output interface in response to the first mode indicated by the mode indicator; and
a plurality of secondary power stage circuits, wherein at least a first one of the plurality of secondary power stage circuits is configured to receive the second modified PWM signal from the primary power stage circuit and output the second modified PWM signal to at least a second one of the plurality of secondary power stage circuits.
2 . The device of claim 1 , wherein the voltage regulation circuitry comprises:
a driving circuitry configured to:
receive the first modified PWM signal from the control circuitry; and
generate, based on the first modified PWM signal, one or more driving signals; and
one or more switching elements that regulate the voltage to the target device in response to the one or more driving signals.
3 . The device of claim 2 , wherein the one or more switching elements comprise:
a high-side Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET); and a low-side MOSFET.
4 . The device of claim 1 , wherein the control circuitry is further configured to transmit the PWM input signal unmodified to the voltage regulation circuitry in response to a second mode indicated by the mode indicator.
5 . The device of claim 4 , wherein the switching component is further configured to not transmit a signal to the PWM output interface in response to the second mode indicated by the mode indicator.
6 . The device of claim 1 , wherein the PWM output interface is configured to operatively connect to an additional instance of the device.
7 . The device of claim 1 , wherein the target device comprises a microprocessor.
8 . A system comprising:
a primary power stage circuit comprising:
a Pulse-Width Modulation (PWM) controller;
a power stage comprising:
a PWM input interface operatively coupled to the PWM controller;
a control circuitry configured to:
receive a PWM input signal from the PWM input interface; and
generate, in response to a first mode indicated by a mode indicator,
a first modified PWM signal and a second modified PWM signal by dividing the PWM input signal;
a voltage regulation circuitry that regulates a voltage to a target device based on the first modified PWM signal;
a PWM output interface; and
a switching component configured to transmit the second modified PWM signal to the PWM output interface in response to the first mode indicated by the mode indicator; and
a plurality of secondary power stage circuits, wherein at least a first one of the plurality of secondary power stage circuits is configured to receive the second modified PWM signal from the primary power stage circuit and output the second modified PWM signal to at least a second one of the plurality of secondary power stage circuits.
9 . The system of claim 8 , wherein the voltage regulation circuitry comprises:
a driving circuitry configured to:
receive the first modified PWM signal from the control circuitry; and
generate, based on the first modified PWM signal, one or more driving signals; and
one or more switching elements that regulate the voltage to the target device in response to the one or more driving signals.
10 . The system of claim 9 , wherein the one or more switching elements comprise:
a high-side Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET); and a low-side MOSFET.
11 . The system of claim 8 , wherein the control circuitry is further configured to transmit the PWM input signal unmodified to the voltage regulation circuitry in response to a second mode indicated by the mode indicator.
12 . The system of claim 11 , wherein the switching component is further configured to not transmit a signal to the PWM output interface in response to the second mode indicated by the mode indicator.
13 . The system of claim 8 , further comprising a plurality of instances of the power stage, wherein the PWM output interface of each instance of the power stage is configured to operatively connect to a subsequent instance of the power stage, excepting a final instance of the power stage.
14 . The system of claim 8 , further comprising the target device.
15 . The system of claim 14 , wherein the target device comprises a microprocessor.
16 . A method comprising:
receiving, by a control circuitry of a primary power stage circuit, a Pulse-Width Modulation (PWM) input signal from a PWM input interface;
generating, by the control circuitry, in response to a first mode indicated by a mode indicator, a first modified PWM signal and a second modified PWM signal by dividing the PWM input signal;
transmitting, by the control circuitry, the first modified PWM signal to a voltage regulation circuitry that regulates a voltage to a target device based on the first modified PWM signal;
transmitting, by a switching component, the second modified PWM signal to a PWM output interface of a first one of a plurality of secondary power stage circuits in response to the first mode indicated by the mode indicator; and
transmitting, by the first one of the plurality of secondary power stage circuits to a second one of the plurality of secondary power stage circuits, the second modified PWM signal in response to the first mode indicated by the mode indicator.
17 . The method of claim 16 , further comprising:
receiving, by a driving circuitry within the voltage regulation circuitry, the first modified PWM signal from the control circuitry;
generating, by the driving circuitry, based on the first modified PWM signal, one or more driving signals; and
regulating, by one or more switching elements, the voltage to the target device in response to the one or more driving signals.
18 . The method of claim 16 , further comprising transmitting, by the control circuitry, the PWM input signal unmodified to the voltage regulation circuitry in response to a second mode indicated by the mode indicator.
19 . The method of claim 18 , wherein the switching component is further configured to not transmit a signal to the PWM output interface in response to the second mode indicated by the mode indicator.
20 . The method of claim 16 , wherein the target device comprises a microprocessor.