Amplifier with adaptive biasing

1 . An amplifier circuit, comprising:

an amplifier having an amplifier input, a tail current input, and an amplifier output;

a resistor having first and second terminals, the second terminal coupled to the amplifier output;

an adaptive bias circuit including:

a detector circuit having a detector input and a detector output, wherein the detector input is coupled to the amplifier output;

a current mirror circuit having a current mirror input and a current mirror output, wherein the current mirror input is coupled to the detector output; and

a transistor having first and second current terminals and a first control terminal, wherein the first current terminal is coupled to a power supply terminal, the second current terminal is coupled to the first terminal of the resistor, and the first control terminal is coupled to the second current terminal.

2 . The amplifier circuit of claim 1 , wherein the resistor is a first resistor and the transistor is a first transistor, and the detector circuit includes:

a second transistor having third and fourth current terminals and a second control terminal, wherein the third current terminal is coupled to the current mirror input; and

a second resistor having a first terminal coupled to the fourth current terminal and a second terminal coupled to the power supply terminal.

3 . The amplifier circuit of claim 2 , wherein the current mirror circuit includes:

a third transistor having fifth and sixth current terminals and a third control terminal, wherein the fifth current terminal is coupled to the third current terminal, and the third control terminal is coupled to the third current terminal;

a third resistor having a first terminal coupled to the sixth current terminal and a second terminal coupled to a ground terminal;

a fourth transistor having seventh and eighth current terminals and a fourth control terminal, wherein the seventh current terminal is coupled to the tail current input of the amplifier, and the fourth control terminal is coupled to the third current terminal; and

a fourth resistor having a first terminal coupled to the eighth current terminal and a second terminal coupled to the ground terminal.

4 . The amplifier circuit of claim 3 , wherein the current mirror circuit includes a capacitor having a first terminal coupled to the third control terminal and a second terminal coupled to the ground terminal.

5 . The amplifier circuit of claim 3 , wherein a gain boost provided to the amplifier by the adaptive bias circuit is a ratio of a resistance of the first resistor to a resistance of the second resistor.

6 . The amplifier circuit of claim 1 , wherein the transistor is a first transistor, and the amplifier includes:

a second transistor having third and fourth current terminals and a second control terminal, wherein the third current terminal is coupled to a first current source, the fourth current terminal is coupled to a second current source, and the second control terminal is coupled to a first signal input; and

a third transistor having fifth and sixth current terminals and a third control terminal, wherein the fifth current terminal is coupled to the first current source and the detector input, the sixth current terminal is coupled to the second current source and the current mirror output, and the third control terminal is coupled to a second signal input.

7 . An amplifier circuit, comprising:

an amplifier having an amplifier input, a tail current input, and an amplifier output, and capable of generating an output signal at the amplifier output that is representative of a difference of a first input signal and a second input signal;

a resistor coupled to the amplifier output, and capable of lowering an output resistance of the amplifier;

an adaptive bias circuit coupled between the amplifier output and the tail current input, and capable of providing to the tail current input a detection current responsive to the output signal, wherein a gain of the amplifier is increased in response to the output signal; and

a diode-connected transistor capable of passing a current to the amplifier output through the resistor.

8 . The amplifier circuit of claim 7 , wherein the adaptive bias circuit includes a detector circuit capable of generating the detection current based on the output signal.

9 . The amplifier circuit of claim 8 , wherein the adaptive bias circuit includes a current mirror circuit coupled to the detector circuit and the tail current input, and capable of mirroring the detection current to the tail current input.

10 . The amplifier circuit of claim 9 , wherein the resistor is a first resistor, the detector circuit includes a first transistor and a second resistor coupled to the first transistor, and the current mirror circuit includes:

a diode-connected transistor including a drain and a gate coupled to the first transistor;

a third resistor coupled to a source of the diode-connected transistor;

a second transistor having a gate coupled to the first transistor, and a drain coupled to the tail current input; and

a fourth resistor coupled to the second transistor.

11 . The amplifier circuit of claim 10 , wherein a gain boost provided to the amplifier by the adaptive bias circuit is a ratio of a resistance of the first resistor to a resistance of the second resistor.

12 . The amplifier circuit of claim 7 , wherein the adaptive bias circuit is capable of increasing a current flowing through the amplifier in response to an increase in amplitude of a signal at the amplifier output.

13 . A voltage regulator circuit, comprising:

an amplifier having an amplifier input, a tail current input, and an amplifier output, and capable of generating an error signal representative of a difference between an output voltage and a reference voltage;

a load resistor coupled to the amplifier output, and capable of lowering an output resistance of the amplifier;

an adaptive bias circuit coupled between the amplifier output and the tail current input, and capable of:

generating a detection current based on the error signal; and

providing the detection current to the tail current input to increase a gain of the amplifier in response to the error signal; and

a field effect transistor (FET) coupled to the amplifier output, and capable of passing a current in response to the error signal.

14 . The voltage regulator circuit of claim 13 , wherein the adaptive bias circuit includes a detector circuit capable of generating the detection current based on the error signal.

15 . The voltage regulator circuit of claim 14 , wherein the adaptive bias circuit includes a current mirror circuit coupled to the detector circuit and the tail current input, and capable of mirroring the detection current to the tail current input.

16 . The voltage regulator circuit of claim 15 wherein:

the detector circuit includes a first resistor having a first resistance;

the current mirror circuit includes:

a second resistor having approximately the first resistance; and

a third resistor having approximately the first resistance;

the load resistor has a second resistance; and

a gain boost provided to the amplifier by the adaptive bias circuit is a ratio of a load resistance to the first resistance.

17 . A voltage regulator circuit including:

an amplifier having an amplifier input, a tail current input, and an amplifier output, and capable of generating an output signal at the amplifier output that is representative of a difference of a first input signal and a second input signal;

a resistor coupled to the amplifier output, and capable of lowering an output resistance of the amplifier;

an adaptive bias circuit coupled between the amplifier output and the tail current input, and capable of providing to the tail current input a detection current responsive to the output signal, wherein a gain of the amplifier is increased in response to the output signal; and

a diode-connected transistor capable of passing a current to the amplifier output through the resistor; and

an output stage coupled to the amplifier output.