Application-specific integrated circuit with integrated difference filter

1 . An integrated circuit comprising:

a sensor configured to sense a stimulus and in response to output an analog signal;

an analog-to-digital converter configured to receive the analog signal and to output a stream of digital values that are in proportion to the analog signal; and

a difference filter configured to receive the digital values and subtract an N number of the digital values from an M number of the digital values to generate filtered values, wherein M and N are counting numbers and the difference filter is configured to calculate a resultant for the equation:

y

⁡

(

n

)

=

1

M

⁢

∑

i

=

n

-

M

+

1

n

⁢

x

⁡

(

i

)

-

1

N

⁢

∑

j

=

n

-

M

-

N

-

Z

+

1

n

-

M

-

Z

⁢

x

⁡

(

j

)

,

wherein Z is a counting number that is a number of digital values to skip while calculating the resultant.

2 . The integrated circuit of claim 1 further comprising a controller configured to set the order of the difference filter.

3 . The integrated circuit of claim 2 wherein the controller is further configured to set resolution for the analog-to-digital converter.

4 . The integrated circuit of claim 2 further comprising a driver stage configured to energize the sensor.

5 . The integrated circuit of claim 4 wherein the controller is further configured to set the energization level and time interval provided to the sensor by the driver stage.

6 . The integrated circuit of claim 2 further comprising a gain stage configured to scale the amplitude of an analog sensor signal generated by the sensor and output a gain adjusted version of the analog sensor signal to the analog-to-digital converter.

7 . The integrated circuit of claim 6 wherein the controller is further configured to set a gain level for the gain stage that scales the amplitude of the analog sensor signal.

8 . The integrated circuit of claim 2 further comprising a stimulus detector configured to receive the filtered values and detect from the filtered values the stimulus sensed by the sensor.

9 . The integrated circuit of claim 8 wherein the controller is further configured to set amplitude thresholds of the stimulus detector.

10 . A method of operating an integrated circuit comprising a sensor configured to sense a stimulus and in response to output an analog signal, an analog-to-digital converter configured to receive the analog signal and to output a stream of digital values that are in proportion to the analog signal, and a difference filter configured to process the digital values with the method comprising subtracting an N number of the digital values from an M number of the digital values to generate filtered values, wherein M and N are counting numbers and the difference filter is configured to calculate a resultant for the equation:

y

⁡

(

n

)

=

1

M

⁢

∑

i

=

n

-

M

+

1

n

⁢

x

⁡

(

i

)

-

1

N

⁢

∑

j

=

n

-

M

-

N

-

Z

+

1

n

-

M

-

Z

⁢

x

⁡

(

j

)

,

wherein Z is a counting number that is a number of digital values to skip while calculating the resultant.

11 . A wireless communication device comprising:

receive circuitry configured to receive radio frequency (RF) signals;

a baseband processor configured to process a digitized version of the RF signals received by the receive circuitry and to extract the information or data bits conveyed in the received RF signals;

transmit circuitry configured to receive encoded data from the baseband processor and to modulate a carrier signal with the encoded data; and

user interface circuitry configured to communicate user input to the baseband processor, the user interface circuitry comprising:

a sensor configured to sense a stimulus and in response to output an analog signal;

an analog-to-digital converter configured to receive the analog signal and to output a stream of digital values that are in proportion to the analog signal; and

a difference filter configured to receive the digital values and to subtract an N number of the digital values from an M number of the digital values to generate filtered values, wherein M and N are counting numbers and the difference filter is configured to calculate a resultant for the equation:

y

⁡

(

n

)

=

1

M

⁢

∑

i

=

n

-

M

+

1

n

⁢

x

⁡

(

i

)

-

1

N

⁢

∑

j

=

n

-

M

-

N

-

Z

+

1

n

-

M

-

Z

⁢

x

⁡

(

j

)

,

wherein Z is a counting number that is a number of digital values to skip while calculating the resultant.

12 . The wireless communication device of claim 11 further comprising a controller configured to set the order of the difference filter.

13 . The wireless communication device of claim 12 wherein the controller is further configured to set resolution for the analog-to-digital converter.

14 . The wireless communication device of claim 12 further comprising a driver stage configured to energize the sensor.

15 . The wireless communication device of claim 14 wherein the controller is further configured to set the energization level and time interval provided to the sensor by the driver stage.

16 . The wireless communication device of claim 12 further comprising a gain stage configured to scale the amplitude of an analog sensor signal generated by the sensor and output a gain adjusted version of the analog sensor signal to the analog-to-digital converter.

17 . The wireless communication device of claim 16 wherein the controller is further configured to set a gain level for the gain stage that scales the amplitude of the analog sensor signal.

18 . The wireless communication device of claim 12 further comprising a stimulus detector configured to receive the filtered values and detect from the filtered values the stimulus sensed by the sensor, wherein the controller is further configured to set amplitude thresholds of the stimulus detector.

19 . The wireless communication device of claim 11 wherein the sensor, the analog-to-digital converter, the difference filter, and stimulus detector are integrated into an application-specific integrated circuit.