Piecewise compensation for voltage reference temperature drift

1 . A circuit comprising:

a current generation circuit having a plurality of temperature inputs including a first temperature input and a second temperature input, a first code input, a second code input, and an output, the current generation circuit configurable to:

receive a first signal at the first temperature input;

receive a second signal at the second temperature input;

receive a first code at the first code input;

receive a second code at the second code input;

responsive to the first signal indicating that a temperature is in a first range, provide a current at the output responsive to the first code; and

responsive to the second signal indicating that the temperature is in a second range, provide the current at the output responsive to the second code.

2 . The circuit of claim 1 , wherein the plurality of temperature inputs further comprises third, fourth, fifth, and sixth temperature inputs, and the current generation circuit is configurable to:

receive a first proportional-to-absolute-temperature (PTAT) sense signal at the third temperature input;

receive a first complementary-to-absolute-temperature (CTAT) sense signal at the fourth temperature input;

receive a second PTAT sense signal at the fifth temperature input; and

receive a second CTAT sense high signal at the sixth temperature input;

wherein the circuit is configurable to:

responsive to the first signal indicating that the temperature is in the first range, provide the current at the output responsive to the first code, the first PTAT sense signal, and the first CTAT sense signal; and

responsive to the second signal indicating that the temperature is in the second range, provide the current at the output responsive to the second code, the second PTAT sense signal, and the second CTAT sense signal.

3 . The circuit of claim 2 , further comprising:

a temperature sense circuit including:

a first transistor having a first terminal, a second terminal, and a control terminal;

a second transistor having a first terminal, a second terminal coupled to the second terminal of the first transistor, and a control terminal;

a first resistor having a first terminal coupled to the first terminal of the first transistor, and a second terminal coupled to a ground terminal; and

a second resistor having a first terminal coupled to the first terminal of the second transistor, and a second terminal coupled to the ground terminal.

4 . The circuit of claim 3 , wherein:

the control terminal of the first transistor is coupled to fourth temperature input; and

the control terminal of the second transistor is coupled to the fifth temperature input.

5 . The circuit of claim 4 , wherein:

in response to receiving the first CTAT sense signal, the first transistor is configured to conduct a bias current to the first resistor to generate the second signal; and

in response to receiving the second PTAT sense signal, the second transistor is configured to conduct the bias current to the second resistor to generate the first signal.

6 . The circuit of claim 2 , wherein:

the current generation circuit includes:

a selection circuit coupled to the first temperature input, the second temperature input, the first code input, and the second code input; and

an output circuit including an input coupled to an output of the selection circuit, the output of the selection circuit includes a first output and a second output; and

the output circuit includes:

a first transistor having a first terminal, a second terminal coupled to the first output of the selection circuit, and a control terminal coupled to the third temperature input;

a second transistor having a first terminal, a second terminal coupled to the first terminal of the first transistor, and a control terminal coupled to the second temperature input;

a third transistor having a first terminal, a second terminal coupled to the first output of the selection circuit, and a control terminal coupled to the sixth temperature input; and

a fourth transistor having a first terminal coupled to the first terminal of the second transistor, a second terminal coupled to the first terminal of the third transistor, and a control terminal coupled to the first temperature input.

7 . The circuit of claim 6 , wherein:

the output circuit includes:

a fifth transistor having a first terminal, a second terminal coupled to the second output of the selection circuit, and a control terminal coupled to the fourth temperature input;

a sixth transistor having a first terminal, a second terminal coupled to the first terminal of the fifth transistor, and a control terminal coupled to the second temperature input;

a seventh transistor having a first terminal, a second terminal coupled to the second output of the selection circuit, and a control terminal coupled to the fifth temperature input; and

an eighth transistor having a first terminal coupled to the first terminal of the sixth transistor, a second terminal coupled to the first terminal of the seventh transistor, and a control terminal coupled to the first temperature input.

8 . The circuit of claim 7 , further comprising:

a ninth transistor including a control terminal coupled to the first terminal of the second transistor and the first terminal of the fourth transistor.

9 . The circuit of claim 8 , further comprising:

a first resistor including a first terminal coupled to the control terminal of the ninth transistor, and a second terminal;

a tenth transistor including a first terminal coupled to the second terminal of the first resistor, a second terminal, and a control terminal;

an eleventh transistor including a first terminal coupled to the second terminal of the tenth transistor, a second terminal, and a control terminal coupled to the second terminal of the first resistor; and

a second resistor including a first terminal coupled to the second terminal of the eleventh transistor, and a second terminal coupled to a ground terminal.

10 . The circuit of claim 9 , further comprising:

a twelfth transistor including a first terminal coupled to the second terminal of the ninth transistor and the first terminal of the sixth transistor and the first terminal of the eighth transistor, a second terminal, and a control terminal coupled to the control terminal of the tenth transistor;

a thirteenth transistor including a first terminal coupled to the second terminal of the twelfth transistor, a second terminal, and a control terminal coupled to the control terminal of the eleventh transistor; and

a third resistor including a first terminal coupled to the second terminal of the thirteenth transistor, and a second terminal coupled to the ground terminal.

11 . The circuit of claim 1 , wherein:

the first code indicates a first temperature code indicative of a boundary of the first range; and

the second code input is a second temperature code indicative of a boundary of the second range.

12 . The circuit of claim 11 , wherein:

the first temperature code is stored in a first register; and

the second temperature code is stored in a second register.

13 . The circuit of claim 1 , wherein:

the current generation circuit is configurable to vary the current according to the temperature indicated by the first PTAT and CTAT sense signals or the second PTAT and CTAT sense signals.

14 . A system comprising:

a current generation circuit having a temperature input and an output and configurable to:

provide a current at the output;

responsive to a signal at the temperature input indicating that the temperature is in a first range, adjust the current with respect to the temperature according to a first relationship; and

responsive to the signal at the temperature input indicating that the temperature is in a second range, adjust the current with respect to the temperature according to a second relationship; and

a bandgap reference circuit having an input coupled to the output of the current generation circuit.

15 . The system of claim 14 , wherein the temperature input is a first temperature input, the current is a first current, the signal is a first signal, the current generation circuit has a second temperature input, and the current generation circuit includes:

a selection circuit configurable to select a second current responsive to the first signal and a second signal at the second temperature input;

an output circuit coupled to the output of the current generation circuit and configurable to:

receive the first current, the first signal, the second signal, and a plurality of absolute temperature signals; and

output a third current based on the first temperature sense signal, the second temperature sense signal, and the plurality of absolute temperature signals; and

a first digital to analog converter (DAC) configured to receive the third current and output the first current;

a second DAC including an output;

a third DAC including an output; and

a summing circuit including a first input coupled to the output of the second DAC, a second input coupled to the output of the third DAC, and an output coupled to the bandgap reference circuit.

16 . The system of claim 15 , wherein:

the first DAC is configured to receive the first signal, the second signal, a first code, and a second code.

17 . The system of claim 15 , wherein:

the selection circuit is a first selection circuit;

the output circuit is a first output circuit; and

the system further comprises:

a second selection circuit configured to select a fourth current responsive to the first signal and the second signal;

a second output circuit configurable to:

receive the fourth current, the first signal, the second signal, and the plurality of absolute temperature signals; and

output a fifth current responsive to on the first signal, the second signal, and the plurality of absolute temperature signals;

a current squarer circuit configurable to receive the fifth current and output a sixth current; and

a second DAC configurable to receive the sixth current and output a seventh current.

18 . The system of claim 17 , further comprising:

a summation circuit configurable to output an eighth current responsive to the third current and the seventh current; and

wherein the bandgap reference circuit is configured to receive the eighth current.