Signal detector
A signal, in particular radio-frequency signal, detector ( 10 ), such as a detector of wake-up radio type has a first circuit ( 20 ) receiving at its input the signal, configured to set the operating point (M) at the output to a predefined DC voltage (Vm_DC) to which a variable part (ΔVm) which is dependent on the signal from the input is added. A second circuit ( 30 ) is connected at its input to the output of the first circuit ( 20 ) and configured to amplify the variable part (ΔVm) of the signal, this second circuit has a chain of at least two logic inverters ( 32 ) in a cascade and operating below the threshold.
1 . A signal detector comprising:
a first circuit receiving at its input the signal, configured to set the operating point at the output to a predefined DC voltage to which a variable part which is dependent on the signal from the input is added, and
a second circuit connected at its input to the output of the first circuit and configured to amplify the variable part of the signal, this second circuit comprising a chain of at least two logic inverters are positioned in a cascade and operate at a subthreshold operating regime,
wherein the predefined DC voltage is selected to bias the input of at least one logic inverter of the second circuit into the subthreshold operating regime.
2 . The signal detector according to claim 1 , the first circuit comprising a bridge of MOS transistors in series which are connected by a midpoint forming the output of the first circuit, the input of the first circuit corresponding to the gate of one of the transistors.
3 . The signal detector according to claim 2 , the MOS transistors of the bridge operating below the threshold.
4 . The signal detector according to claim 2 , the bridge of MOS transistors comprising a pull-up transistor and a pull-down transistor, the signal being applied to the gate of the pull-up transistor and a control voltage being applied to the gate of the pull-down transistor.
5 . The signal detector according to claim 2 , the MOS transistors of the bridge being of NMOS type.
6 . The signal detector according to claim 1 , the first and/or second circuit being supplied with voltages Vdd and −Vss such that |Vdd−Vss| is between 0 V and 0.6 V.
7 . The signal detector according to claim 6 , the voltage Vdd being between 0 V and 300 mV and/or the voltage −Vss being between −300 mV and 0 V.
8 . The signal detector according to claim 1 , a first part of the chain of inverters being configured to work without saturation, and a second part of the chain of inverters following the first being configured to work in saturation mode so that the signal at the output of each inverter of the second substantially reaches values Vdd and −Vss.
9 . The signal detector according to claim 1 , the second circuit being connected at the output of one inverter of the chain to an artificial neuron.
10 . The signal detector according to claim 9 , the artificial neuron being of leaky integrate-and-fire type.
11 . The signal detector according to claim 1 , which is a radiocommunication receiver.
12 . The signal detector according to claim 1 , the second circuit being an artificial neuron of axon hillock type and comprising:
a feedback capacitor connected between the input and the output of the second circuit, and
a feedback transistor controlled by the output voltage of the second circuit at the gate, and one terminal of which is connected to the input of the second circuit.
13 . The signal detector according to claim 12 , comprising a membrane capacitor being the input capacitor of the first inverter of said chain.
14 . A method for generating electrical pulses in order to supply a spiking neural network (SNN) with the signal detector of claim 8 , wherein the signal being modulated.
15 . A method for generating electrical pulses in order to provide a received signal strength indicator RSSI with the signal detector of claim 11 , wherein the signal being a continuous wave CW.
16 . The method as claimed in claim 15 further comprising estimating the distance at which the transmission source is located in networks of communicating objects with the signal detector.
17 . A telecommunications node comprising the detector according to claim 1 , a main transceiver and a control unit the detector being configured to send, upon detecting the signal, a switching signal to the control unit, the latter being configured to activate, upon receiving the switching signal, the main transceiver.
18 . A method for detecting a signal having a frequency between 1 Hz and 1 THz, using the detector according to claim 1 , comprising detecting the signal by means of the detector and generating a digital signal at the output of the detector.
19 . The method according to claim 18 , the radio-frequency signal being modulated according to one of the following modulation schemes: amplitude-shift keying, on-off keying, pulse-position modulation and pulse-width modulation.