Near-field communication chip, phase synchronization method, and electronic device

1 . A near-field communication chip, comprising:

a processing circuit, configured to determine a first carrier frequency offset between a local clock signal and a carrier clock signal, and generate a first frequency control word based on the first carrier frequency offset, wherein the carrier clock signal is determined based on a received signal received by the near-field communication chip;

a phase-locked loop, configured to generate a first clock signal based on the local clock signal and the first frequency control word; and

a phase alignment circuit, configured to perform phase selection on the first clock signal based on the carrier clock signal to obtain a second clock signal, and send the second clock signal to a transmitter circuit,

wherein the processing circuit is configured to generate the first frequency control word in accordance with determining that the first carrier frequency offset is greater than a first threshold.

2 . The near-field communication chip according to claim 1 , wherein the phase alignment circuit is further configured to:

sample the first clock signal at a first sampling frequency to obtain N sampling clock signals, wherein the first sampling frequency is N times a frequency of the first clock signal, and N is a positive integer;

obtain, from the N sampling clock signals based on a first phase sampling signal of a data frame and a phase shift accumulated from a second carrier frequency offset that is between the carrier clock signal and the first clock signal and that is generated by the processing circuit, a second clock signal having a smallest phase difference from the carrier clock signal; and

send the second clock signal to the transmitter circuit.

3 . The near-field communication chip according to claim 2 , wherein the phase alignment circuit is configured to: in accordance with a determination made by the processing circuit that the second carrier frequency offset is greater than a second threshold, obtain the second clock signal having the smallest phase difference from the carrier clock signal.

4 . The near-field communication chip according to claim 1 , wherein the processing circuit is further configured to obtain the carrier clock signal of the received signal in accordance with a determination of using binary phase shift keying (BPSK) based on a data frame.

5 . The near-field communication chip according to claim 1 , wherein the processing circuit is further configured to: in accordance with a determination of using non-binary phase shift keying non-binary phase shift keying (non-BPSK) based on the data frame, obtain the carrier clock signal at a first bit in a data frame, and generate a second frequency control word based on the carrier clock signal;

the phase-locked loop is configured to generate a third clock signal based on the local clock signal and the second frequency control word; and

the phase alignment circuit is configured to perform phase selection on the third clock signal based on the carrier clock signal to obtain a fourth clock signal, and send the fourth clock signal to the transmitter circuit, wherein the fourth clock signal is used by the transmitter circuit to transmit a second bit in the data frame, and the first bit is different from the second bit.

6 . An electronic device, comprising a near-field communication chip, a receiver circuit, and a transmitter circuit, wherein the near-field communication chip is separately coupled to the receiver circuit and the transmitter circuit,

wherein the near-field communication chip is configured to perform the operations of:

obtaining a received signal through the receiver circuit;

determining a carrier clock signal based on the received signal;

determining a first carrier frequency offset between a local clock signal of the near-field communication chip and the carrier clock signal;

generating a first frequency control word based on the first carrier frequency offset;

performing frequency control on the local clock signal based on the first frequency control word to generate a first clock signal;

performing phase selection on the first clock signal based on the carrier clock signal to obtain a second clock signal; and

sending the second clock signal to the transmitter circuit; and

wherein the transmitter circuit is configured to perform active load modulation by using the second clock signal,

wherein the near-field communication chip is configured to perform the generating the first frequency control word in accordance with determining that the first carrier frequency offset is greater than a first threshold.

7 . The electronic device according to claim 6 , wherein the near-field communication chip is further configured to sample the first clock signal at a first sampling frequency to obtain N sampling clock signals, wherein the first sampling frequency is N times a frequency of the first clock signal, and N is a positive integer; and obtain, from the N sampling clock signals based on a first phase sampling signal of a data frame and a phase shift accumulated from a second carrier frequency offset between the carrier clock signal and the first clock signal, a second clock signal having a smallest phase difference from the carrier clock signal.

8 . The electronic device according to claim 7 , wherein the near-field communication chip is further configured to: before obtaining, from the N sampling clock signals, the second clock signal having the smallest phase difference from the carrier clock signal, determine that a phase shift accumulated from the second carrier frequency offset is greater than a second threshold.

9 . The electronic device according to claim 6 , wherein before determining the first carrier frequency offset between the local clock signal and the carrier clock signal, the near-field communication chip is further configured to determine to use binary phase shift keying (BPSK) based on a data frame.

10 . The electronic device according to claim 6 , wherein

the near-field communication chip is further configured to: in accordance with a determination of using non-binary phase shift keying (non-BPSK) based on the data frame, obtain the carrier clock signal at a first bit in a data frame, and generate a second frequency control word based on the carrier clock signal; perform frequency control on the local clock signal based on the second frequency control word to generate a third clock signal; and perform phase selection on the third clock signal based on the carrier clock signal to obtain a fourth clock signal; and

the transmitter circuit is further configured to perform active load modulation by using the fourth clock signal to transmit a second bit in the data frame, wherein the first bit is different from the second bit.

11 . A phase synchronization method applied to a near-field communication chip, the method comprising:

determining a first carrier frequency offset between a local clock signal and a carrier clock signal that is determined based on a received signal, and generating a first frequency control word based on the first carrier frequency offset;

performing frequency control on the local clock signal based on the first frequency control word to generate a first clock signal; and

performing phase selection on the first clock signal based on the carrier clock signal to obtain a second clock signal,

wherein the generating the first frequency control word is performed in accordance with determining that the first carrier frequency offset is greater than a first threshold.

12 . The phase synchronization method according to claim 11 , further comprising:

performing active load modulation by using the second clock signal.

13 . The phase synchronization method according to claim 11 , wherein the performing the phase selection on the first clock signal based on the carrier clock signal comprises:

sampling the first clock signal at a first sampling frequency to obtain N sampling clock signals, wherein the first sampling frequency is N times a frequency of the first clock signal, and N is a positive integer; and obtaining, from the N sampling clock signals based on a first phase sampling signal of a data frame and a phase shift accumulated from a second carrier frequency offset between the carrier clock signal and the first clock signal, a second clock signal having a smallest phase difference from the carrier clock signal.

14 . The phase synchronization method according to claim 13 , wherein before obtaining, from the N sampling clock signals, the second clock signal having the smallest phase difference from the carrier clock signal, the method further comprises determining that a phase shift accumulated from the second carrier frequency offset is greater than a second threshold.

15 . The phase synchronization method according to claim 11 , wherein before determining the first carrier frequency offset between the local clock signal and the carrier clock signal that is determined based on a received signal, the method further comprises determining to use binary phase shift keying (BPSK) based on a data frame.

16 . The phase synchronization method according to claim 11 , comprising:

in accordance with a determination of using a non-binary phase shift keying (non-BPSK) based on the data frame, obtaining the carrier clock signal at a first bit in a data frame, and generating a second frequency control word based on the carrier clock signal;

performing frequency control on the local clock signal based on the second frequency control word to generate a third clock signal; and performing phase selection on the third clock signal based on the carrier clock signal to obtain a fourth clock signal; and

performing active load modulation by using the fourth clock signal to transmit a second bit in the data frame, wherein the first bit is different from the second bit.