IP Library Granted Patent US 12707169
Granted Patent B2
US 12707169 · App. 18/840,715 · Granted Aug 11, 2026

Solid-state imaging element and electronic device

Inventor: Nobuaki Otake (Kanagawa, JP)
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
H04N25/77
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12707169
App. No.
18/840,715
Granted
Aug 11, 2026
Kind
B2
Abstract

Provided is a solid-state imaging element and an electronic device capable of suppressing a delay in response of a pixel circuit due to an increase in the number of pixels. According to the present disclosure, there is provided a solid-state imaging element including a plurality of pixel circuits that is driven according to a first signal supplied from a first signal line, a first drive circuit unit that supplies the first signal from one end side of the first signal line, and a passive circuit unit that supplies a voltage according to a level of the first signal on another end side of the first signal line, from the another end side of the first signal line.

Claims (87)

1 . A solid-state imaging element, comprising:

a plurality of pixel circuits configured to be driven based on a first signal from a first signal line and a second signal from a second signal line;

a first drive circuit unit configured to:

supply the first signal from a first end side of the first signal line; and

supply the second signal from a first end side of the second signal line;

a second drive circuit unit configured to supply a third signal, based on the second signal from a second end side of the second signal line, in synchronization with the first drive circuit unit; and

a passive circuit unit configured to supply a first voltage based on a level of the first signal on a second end side of the first signal line, wherein the first voltage is supplied from the second end side of the first signal line.

2 . The solid-state imaging element according to claim 1 , wherein a width of the passive circuit unit in a direction of arrangement of the plurality of pixel circuits is narrower than a width of the first drive circuit unit in the direction.

3 . The solid-state imaging element according to claim 1 , wherein a width, based on addition of a width of the second drive circuit unit and a width of the passive circuit unit in a direction of arrangement of the plurality of pixel circuits, is narrower than a width of the first drive circuit unit in the direction.

4 . The solid-state imaging element according to claim 1 , wherein

the plurality of pixel circuits is further configured to be driven based on a fourth signal from a third signal line,

the first drive circuit unit is further configured to supply the fourth signal from a first end side of the third signal line, and

the passive circuit unit is further configured to supply a second voltage from a second end side of the third signal line based on to a level of the fourth signal on the second end side of the third signal line.

5 . The solid-state imaging element according to claim 4 , wherein

the passive circuit unit includes:

a first passive circuit configured to supply a third voltage, based on a level of the first signal, from the second end side of the first signal line; and

a second passive circuit configured to supply the second voltage, based on a level of the fourth signal, from the second end side of the third signal line.

6 . The solid-state imaging element according to claim 5 , wherein the first passive circuit and the second passive circuit are configured to respond at different signal levels.

7 . The solid-state imaging element according to claim 4 , wherein

a pixel circuit of the plurality of pixel circuits includes:

a photoelectric conversion unit configured to:

execute photoelectric conversion on incident light; and

accumulate signal charges,

the first signal is a signal to read the signal charges accumulated in the photoelectric conversion unit to a floating diffusion region, and

the fourth signal is

a signal to reset the floating diffusion region, or

a signal to read signal charges accumulated in the floating diffusion region.

8 . The solid-state imaging element according to claim 1 , wherein

the passive circuit unit includes a passive circuit configured to supply the first voltage based on a level of the first signal on the second end side of the first signal line, and

the passive circuit includes:

a first switching element that is connected between a first potential and the second end side of the first signal line, wherein the first potential is based on a high level signal of the first signal;

a second switching element that is connected between a second potential and the second end side of the first signal line, wherein the second potential is based on a low level signal of the first signal; and

a drive element configured to:

bring the first switching element into a conductive state in a case where a signal level of the first signal increases to exceed a first value; and

bring the second switching element into a conductive state in a case where the signal level of the first signal decreases below a second value.

9 . The solid-state imaging element according to claim 8 , wherein the drive element is further configured to:

bring the first switching element into a non-conductive state in a case where the signal level of the first signal is lower than the first value; and

bring the second switching element into a non-conductive state in a case where the signal level of the first signal is equal to or higher than the second value.

10 . The solid-state imaging element according to claim 9 , wherein the first value corresponds to a value of a potential higher than the second value.

11 . The solid-state imaging element according to claim 9 , wherein the first value and the second value correspond to a same value.

12 . The solid-state imaging element according to claim 9 , wherein

each of the first switching element and the second switching element is a transistor, and

the drive element is further configured to supply a fifth signal, to bring the first switching element and the second switching element into the conductive state or the non-conductive state, to a gate of each of the first switching element and the second switching element based on one of the first value and the second value.

13 . The solid-state imaging element according to claim 12 , wherein

the drive element includes:

a first inverter that has

a first end connected to the second end side of the first signal line, and a second end connected to the gate of the first switching element, and

a first drive threshold value corresponding to the first value; and

a second inverter that has

a first end connected to the second end side of the first signal line, and a second end connected to the gate of the second switching element, and

a second drive threshold value corresponding to the second value.

14 . The solid-state imaging element according to claim 12 , wherein

the drive element includes:

an inverter that has

a first end connected to the second end side of the first signal line, and a second end connected to the gate of each of the first switching element and the second switching element, and

a drive threshold value corresponding to at least one of the first value or the second value.

15 . The solid-state imaging element according to claim 12 , wherein the first switching element is a PMOS transistor, and the second switching element is a first NMOS transistor.

16 . The solid-state imaging element according to claim 15 , wherein

the drive element includes:

a first resistor that has a first end connected to the first potential, and a second end connected to the second end side of the first signal line;

a second resistor that has a first end connected to the second end of the first resistor, and a second end connected to the second potential;

a second NMOS transistor that is connected between two points of the second resistor;

an inverter that has a first end connected to a gate of the second NMOS transistor, and a second end connected to the gate of the second switching element, wherein the inverter is connected to the gate of each of the first NMOS transistor and the second NMOS transistor; and

a comparator that has an inversion terminal connected to the second end side of the first signal line, a non-inversion terminal connected to the second end of the first resistor, and an output terminal connected to the second end of the inverter.

17 . The solid-state imaging element according to claim 1 , wherein

a pixel circuit of the plurality of pixel circuits includes:

a photoelectric conversion unit configured to:

execute photoelectric conversion on incident light; and

accumulate signal charges,

the first signal is a signal to read the signal charges accumulated in the photoelectric conversion unit to a floating diffusion region, and

the second signal is

a signal to reset the floating diffusion region, or

a signal to read signal charges accumulated in the floating diffusion region.

18 . The solid-state imaging element according to claim 1 , further comprising: a plurality of first signal lines that includes the first signal line, wherein

the plurality of pixel circuits is configured to be driven based on first signals from each of the plurality of first signal lines,

the first signals includes the first signal,

the first drive circuit unit is configured to supply the first signals from a first end side of each of the plurality of first signal lines, and

the passive circuit unit is configured to supply the first voltage from second end sides of the plurality of first signal lines based on the level of the first signal on a second end side of each of the plurality of first signal lines.

19 . An electronic device, comprising:

a solid-state imaging element, comprising:

a plurality of pixel circuits configured to be driven based on a first signal from a first signal line and a second signal from a second signal line;

a first drive circuit unit configured to:

supply the first signal from a first end side of the first signal line; and

supply the second signal from a first end side of the second signal line;

a second drive circuit unit configured to supply a third signal, based on the second signal from a second end side of the second signal line, in synchronization with the first drive circuit unit; and

a passive circuit unit configured to supply a voltage based on a level of the first signal on a second end side of the first signal line, wherein the voltage is supplied from the second end side of the first signal line; and

an optical system configured to guide light for an imaging process to the solid-state imaging element.