IP Library › Granted Patent US 12707199
Granted Patent B2
US 12707199 · App. 18/494,567 · Granted Aug 11, 2026

Filtering architecture with minimized transients

Inventors: Dietmar Straeussnigg (Villach, AT); Simon Grünberger (Moosburg, AT); Mario Grgic (Villach, AT)
Assignee: Infineon Technologies AG
H04R3/06H04R19/04H03M3/494H04R2201/003
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Quick Facts
Patent No.
US 12707199
App. No.
18/494,567
Granted
Aug 11, 2026
Kind
B2
Abstract

A digital microphone includes a logarithmic amplifier; an analog-to-digital converter (ADC) coupled to the logarithmic amplifier; a digital decompression component coupled to the ADC; and a digital filter coupled to the digital decompression component, wherein the digital filter includes a controlled upsampling component coupled to an input of the digital filter and a controlled downsampling component coupled to an output of the digital filter.

Claims (14)

1 . A digital microphone comprising:

a logarithmic amplifier;

an analog-to-digital converter (ADC) coupled to the logarithmic amplifier;

a digital decompression component coupled to the ADC; and

a digital filter coupled to the digital decompression component, wherein the digital filter comprises a controlled upsampling component coupled to an input of the digital filter and a controlled downsampling component coupled to an output of the digital filter.

2 . The digital microphone of claim 1 , further comprising a controller having an input configured for receiving a trigger signal and having a first output.

3 . The digital microphone of claim 2 , wherein the upsampling component comprises a multiplexer having a control input coupled to the first output of the controller.

4 . The digital microphone of claim 2 , wherein the downsampling component comprises a multiplexer having a control input coupled to the first output of the controller.

5 . The digital microphone of claim 2 , wherein the controller further comprises a second output.

6 . The digital microphone of claim 5 , wherein the upsampling component comprises a repeater having a control input coupled to the second output of the controller.

7 . The digital microphone of claim 5 , wherein the downsampling component comprises a decimation component having a control input coupled to the second output of the controller.

8 . The digital microphone of claim 1 , wherein the upsampling component comprises a constant interpolation repeater, a variable interpolation repeater, or a general interpolation component.

9 . The digital microphone of claim 1 , wherein the downsampling component comprises a constant decimation component, a variable decimation component, or a general decimation component.

10 . The digital microphone of claim 1 , wherein the ADC comprises a sigma-delta converter.