Wiring substrate and method for manufacturing the same
A wiring substrate includes a substrate, and a conductor layer formed on the substrate and including copper such that the conductor layer is patterned. The conductor layer is formed such that the upper surface of the conductor layer has a width that is equal to or larger than a width of the lower surface of the conductor layer and that the width of the lower surface is larger than the minimum width of a middle portion of the conductor layer between the upper surface and the lower surface.
1 . A wiring substrate, comprising:
a substrate; and
a plurality of high-density wiring patterns formed on the substrate and comprising copper such that the high-density wiring patterns have upper surfaces that are not in contact with each other and that adjacent high-density wiring patterns have an inter-wiring distance determined based on widths of the upper surfaces of the adjacent high-density wiring patterns,
wherein the plurality of high-density wiring patterns is formed such that the upper surface of each of the high-density wiring patterns has a width that is larger than a width of a lower surface of each of the high-density wiring patterns, that a ratio, the width of the upper surface/the width of the lower surface, is smaller than 1.15 and that the width of the lower surface is larger than a minimum width of a middle portion of each of the high-density wiring patterns between the upper surface and the lower surface.
2 . The wiring substrate according to claim 1 , wherein a ratio, the width of the upper surface/the minimum width of the middle portion, is larger than 1.15.
3 . The wiring substrate according to claim 1 , wherein a ratio, the width of the upper surface/the minimum width of the middle portion, is in a range of larger than 1.15 to smaller than 1.75.
4 . The wiring substrate according to claim 1 , wherein the plurality of high-density wiring patterns is formed by a process comprising etching a copper plating film formed on the substrate with a copper chloride etching solution comprising an etching inhibitor.
5 . The wiring substrate according to claim 2 , wherein a ratio, the width of the upper surface/the minimum width of the middle portion, is in a range of larger than 1.15 to smaller than 1.75.
6 . The wiring substrate according to claim 2 , wherein the plurality of high-density wiring patterns is formed by a process comprising etching a copper plating film formed on the substrate with a copper chloride etching solution comprising an etching inhibitor.
7 . The wiring substrate according to claim 3 , wherein the plurality of high-density wiring patterns is formed by a process comprising etching a copper plating film formed on the substrate with a copper chloride etching solution comprising an etching inhibitor.
8 . The wiring substrate according to claim 5 , wherein the plurality of high-density wiring patterns is formed by a process comprising etching a copper plating film formed on the substrate with a copper chloride etching solution comprising an etching inhibitor.
9 . The wiring substrate according to claim 1 , wherein the plurality of high-density wiring patterns is made of copper.
10 . The wiring substrate according to claim 9 , wherein a ratio, the width of the upper surface/the minimum width of the middle portion, is larger than 1.15.
11 . The wiring substrate according to claim 9 , wherein the ratio, the width of the upper surface/the minimum width of the middle portion, is in a range of larger than 1.15 to smaller than 1.75.
12 . The wiring substrate according to claim 9 , wherein the plurality of high-density wiring patterns is formed by a process comprising etching a copper plating film formed on the substrate with a copper chloride etching solution comprising an etching inhibitor.
13 . The wiring substrate according to claim 1 , wherein the substrate is a core substrate.
14 . The wiring substrate according to claim 1 , wherein the substrate is an insulating layer.
15 . The wiring substrate according to claim 1 , wherein a ratio, the width of the upper surface/the minimum width of the middle portion, is smaller than 1.75.
16 . The wiring substrate according to claim 1 , wherein the plurality of high-density wiring patterns is an etched copper plating film formed on the substrate.