Electronic assembly having a power semiconductor component between two circuit carriers, and method for producing same

Inventors: Arne Stephen Fischer (Leinfelden-Echterdingen, DE); Hartmut Wayand (Pfullingen, DE); Johannes Meckbach (Tuebingen, DE); Lukas Loeber (Ludwigsburg, DE); Thomas Kiedrowski (Sersheim, DE)

Assignee: ROBERT BOSCH GMBH

H05K1/181 H05K3/34 H10W90/401 H05K2201/10166 H10W72/07336 H10W90/734

View Patent ↗

Loading inventors, assignments & file history…

Monitor This Case

Get email alerts when status or documents change.

Order Certified Copies

Most orders are placed with the USPTO same day — all within 24 business hours.

Order via The Patent Place →

Pre-filled with this patent's details

Quick Facts

Patent No.: US 12707570
App. No.: 18/685,137
Granted: Aug 11, 2026
Kind: B2

External Links

USPTO Patent Center↗ Full Patent PDF↗

Abstract

An electronic assembly having a power semiconductor component and a circuit carrier. The power semiconductor component has a contact region on opposite sides; the contact region facing the circuit carrier is in electrical contact with a connection region of the circuit carrier; the power semiconductor component is in electrical contact on the side facing away from the circuit carrier, in the region of the contact region, with a further circuit carrier; an additively generated connecting layer is arranged on the contact region and/or the connection region of the circuit carriers; and the connecting layer is connected to the connection region and/or the contact region using a solder connection. The connecting layer has a lower modulus of elasticity in a direction or plane extending perpendicularly to the surface of the power semiconductor component than in a direction or plane extending in parallel with the surface of the power semiconductor component.

Claims (19)

1 . An electronic assembly, comprising:

a power semiconductor component and a circuit carrier, the power semiconductor component having at least one contact region on each of opposite sides of the power semiconductor component, and at least of the contact regions facing the circuit carrier being in electrical contact with a connection region of the circuit carrier;

wherein the power semiconductor component is in electrical contact on a side facing away from the circuit carrier, in a region of at least one of the contact regions of the power semiconductor component, with a further circuit carrier, an additively generated connecting layer is arranged on the at least one contact region and/or the connection region of the circuit carriers, and the at least one connecting layer is connected to the connection region and/or the contact region by a solder connection;

wherein the connecting layer has a lower modulus of elasticity in a direction extending perpendicularly to a surface of the power semiconductor component than in a direction extending in parallel with the surface of the power semiconductor component.

2 . The electronic assembly according to claim 1 , wherein the connecting layer is formed from a plurality of sub-layers of a metal starting material, and at least some of the sub-layers have gaps or free spaces in a plane extending in parallel with a surface of the power semiconductor component.

3 . The electronic assembly according to claim 1 , wherein the connecting layer has a lower modulus of elasticity in a plane extending perpendicularly to a surface of the power semiconductor component than in a plane extending in parallel with a plane of the power semiconductor component, by forming the connecting layer with a herringbone pattern.

4 . The electronic assembly according to claim 1 , wherein the circuit carrier and the further circuit carrier are in electrical contact with one another in a region outside the power semiconductor component, and at least one of the additively generated connecting layers is arranged in a region of the contacting.

5 . The electronic assembly according to claim 1 , wherein the circuit carrier and the further circuit carrier are in electrical contact with one another in a region outside the power semiconductor component, with an interposition of a contact element, and at least one of the additively generated connecting layers is arranged in a region of the contacting.

6 . The electronic assembly according to claim 1 , wherein the power semiconductor component is a transistor and the circuit carrier and the further circuit carrier are each a substrate.

7 . The electronic assembly according to claim 1 , wherein the connecting layer is produced by layer-by-layer construction of a metal starting material and subsequent selective melting of the metal starting material by an electron beam.

8 . The electronic assembly according to claim 2 , wherein at least a first sub-layer of the connecting layer formed on the contact region or the connection region is a full-surface sub-layer.

9 . The electronic assembly according to claim 2 , wherein at least one of the sub-layers of the connecting layer arranged on the side facing the connection region has gaps or free spaces.

10 . The electronic assembly according to claim 7 , wherein the metal starting material is metal powder and the electron beam is a laser beam.

11 . A method for forming an electronic assembly, the method comprising the following steps:

constructing a connecting layer on and/or in a region of a contact region of a power semiconductor component and/or on a connection region of a circuit carrier and/or of a further circuit carrier in an additive manufacturing process;

contacting the circuit carrier and the further circuit carrier with interposition of the power semiconductor component; and

forming a solder connection between the connecting layer and: (i) the connection region, or (ii) the contact region;

12 . The method according to claim 11 , wherein a solder is applied on the connecting layer by dispensing.