Three-dimensional memory device with ferroelectric material

1 . A method of forming a memory device, the method comprising:

forming a first layer stack over a substrate;

forming an isolation layer over the first layer stack;

forming a second layer stack over the isolation layer, wherein each of the first layer stack and the second layer stack comprises a first source/drain layer, a second source/drain layer over the first source/drain layer, and a dielectric layer between the first source/drain layer and the second source/drain layer;

forming an opening through the first layer stack, the isolation layer, and the second layer stack;

replacing a first portion of the dielectric layer of the first layer stack and a second portion of the dielectric layer of the second layer stack exposed by the opening with a channel material;

after the replacing, lining sidewalls of the opening with a ferroelectric material;

after lining the sidewalls, filling the opening with an electrically conductive material to form a gate electrode; and

after filling the opening, forming a staircase shaped region by performing a plurality of etching processes using different etching masks to etch the first layer stack, the isolation layer, and the second layer stack, wherein after the plurality of etching processes, the first source/drain layer of the first layer stack extends beyond lateral extents of the second source/drain layer of the first layer stack, the first source/drain layer of the second layer stack extends beyond lateral extents of the second source/drain layer of the second layer stack, and the second source/drain layer of the first layer stack extends beyond lateral extents of the first source/drain layer of the second layer stack.

2 . The method of claim 1 , wherein the replacing comprises:

selectively removing the first portion of the dielectric layer of the first layer stack and the second portion of the dielectric layer of the second layer stack, wherein the selective removing forms a first sidewall recess in the dielectric layer of the first layer stack and forms a second sidewall recess in the dielectric layer of the second layer stack; and

filling the first sidewall recess and the second sidewall recess with a first portion of the channel material and a second portion of the channel material, respectively.

3 . The method of claim 1 , wherein the channel material is formed to comprise a first portion embedded in the dielectric layer of the first layer stack and comprise a second portion embedded in the dielectric layer of the second layer stack, wherein the first portion of the channel material is spaced apart from the second portion of the channel material.

4 . The method of claim 3 , wherein the ferroelectric material is formed to contact and extend along a first sidewall of the first portion of the channel material and a second sidewall of the second portion of the channel material, wherein the ferroelectric material is formed to extend continuously from an upper surface of the second layer stack distal from the substrate to a lower surface of the first layer stack facing the substrate.

5 . The method of claim 1 , wherein the first source/drain layer and the second source/drain layer are formed of a same metal material, wherein the channel material is a metal oxide.

6 . The method of claim 1 , further comprising, after forming the staircase shaped region, forming contact plugs over the staircase shaped region, wherein the contact plugs are electrically coupled to the first source/drain layer and the second source/drain layer of the first layer stack, and electrically coupled to the first source/drain layer and the second source/drain layer of the second layer stack.

7 . A method of forming a memory device, the method comprising:

forming a first layer stack over a substrate, wherein the first layer stack comprises a first metal layer, a second metal layer over the first metal layer, and a first dielectric material between the first metal layer and the second metal layer;

forming a second dielectric material over the first layer stack;

forming a second layer stack over the second dielectric material, wherein the second layer stack has a same layered structure as the first layer stack;

forming an opening that extends through the second layer stack, the second dielectric material, and the first layer stack;

selectively removing portions of the first dielectric material exposed by the opening to form a first sidewall recess and a second sidewall recess in the first layer stack and the second layer stack, respectively;

forming a channel material in the first sidewall recess and the second sidewall recess;

after forming the channel material, forming a ferroelectric material along sidewalls of the opening; and

after forming the ferroelectric material, filling the opening with an electrically conductive material.

8 . The method of claim 7 , wherein the ferroelectric material contacts and extends along the first layer stack, the second layer stack, the second dielectric material, and the channel material.

9 . The method of claim 7 , wherein the channel material is formed to have a first portion in the first sidewall recess and a second portion in the second sidewall recess, wherein the first portion is spaced apart from the second portion.

10 . The method of claim 7 , wherein the ferroelectric material is formed to extend continuously from an upper surface of the second layer stack distal from the substrate to a lower surface of the first layer stack proximate to the substrate.

11 . The method of claim 10 , wherein the ferroelectric material is between, and contacts, the channel material and the electrically conductive material.

12 . The method of claim 7 , wherein the first metal layer and the second metal layer are formed of a same metal material, wherein the first dielectric material and the second dielectric material are different dielectric materials.

13 . The method of claim 7 , wherein the first metal layer and the second metal layer are formed of a first metal material selected from the group consisting of Sc, Ti, Cr, Ni, and Al, or are formed of a second metal material selected from the group consisting of Nb, Pd, Pt, and Au.

14 . The method of claim 7 , further comprising, after filling the opening, forming a staircase shaped region by etching the second layer stack, the second dielectric material, and the first layer stack, wherein the staircase shaped region is formed laterally adjacent to the electrically conductive material, wherein the first layer stack in the staircase shaped region extends farther laterally from the electrically conductive material than the second layer stack in the staircase shaped region.

15 . The method of claim 14 , wherein in the staircase shaped region, the first metal layer of the first layer stack extends farther laterally from the electrically conductive material than the second metal layer of the first layer stack, and the first metal layer of the second layer stack extends farther laterally from the electrically conductive material than the second metal layer of the second layer stack.

16 . A method of forming a memory device, the method comprising:

forming a first layer stack, an isolation layer, and a second layer stack successively over a substrate, wherein each of the first layer stack and the second layer stack comprises a first source/drain layer, a second source/drain layer over the first source/drain layer, and a dielectric layer between the first source/drain layer and the second source/drain layer, wherein the first source/drain layer and the second source/drain layer are formed of a same metal material;

after forming the first layer stack, the isolation layer, and the second layer stack, forming an opening that extends through the first layer stack, the isolation layer, and the second layer stack, wherein the opening exposes a first portion of the dielectric layer of the first layer stack and a second portion of the dielectric layer of the second layer stack;

replacing the first portion of the dielectric layer of the first layer stack and the second portion of the dielectric layer of the second layer stack with a channel material;

after the replacing, lining sidewalls of the opening with a ferroelectric material; and

after the lining, forming a gate electrode by filling the opening with an electrically conductive material.

17 . The method of claim 16 , wherein the channel material comprises a first portion embedded in the dielectric layer of the first layer stack and comprises a second portion in the dielectric layer of the second layer stack, wherein the first portion of the channel material is spaced apart from the second portion of the channel material.

18 . The method of claim 17 , wherein the ferroelectric material contacts and extends along a first sidewall of the first portion of the channel material and a second sidewall of the second portion of the channel material.

19 . The method of claim 17 , wherein the ferroelectric material contacts and extends along the gate electrode.

20 . The method of claim 16 , further comprising, after forming the gate electrode, forming a staircase shaped region laterally adjacent to the gate electrode by etching the second layer stack, the isolation layer, and the first layer stack, wherein the first layer stack in the staircase shaped region extends farther laterally from the gate electrode than the second layer stack in the staircase shaped region.