Stacked 3D cache configuration with on-chip power support
A semiconductor module includes a first semiconductor die, which comprises (i) a power support structure and (ii) a first cache region; and a second semiconductor die, which is mounted on top of the first semiconductor die and comprises (i) a logic core, which overlies and is electrically connected to the power support structure, and (ii) a second cache region, which overlies and is electrically connected to the first cache region.
1 . A semiconductor module comprising:
a first semiconductor die, which comprises (i) a power support structure and (ii) a first cache region; and
a second semiconductor die, which is mounted on top of the first semiconductor die and comprises (i) a logic core, which overlies and is electrically connected to the power support structure, and (ii) a second cache region, which overlies and is electrically connected to the first cache region.
2 . The semiconductor module of claim 1 , wherein the first semiconductor die embodies a first technology node and the second semiconductor die embodies a second technology node that is different than the first technology node.
3 . The semiconductor module of claim 1 , further comprising: a heat sink, which is mounted on top of the second semiconductor die.
4 . The semiconductor module of claim 1 , wherein the first cache region is adjacent to the power support structure and the second cache region is adjacent to the logic core.
5 . The semiconductor module of claim 1 , wherein the power support structure comprises a magnetic structure.
6 . The semiconductor module of claim 1 , wherein the power support structure comprises a linear regulator.
7 . The semiconductor module of claim 1 , wherein the power support structure comprises an inductor with a natural frequency of about 65 MHz to about 100 MHz.
8 . The semiconductor module of claim 1 , wherein the power support structure comprises a 100 MHz inductor in one or more back end of line layers.
9 . The semiconductor module of claim 1 , wherein the power support structure comprises a buck converter.
10 . The semiconductor module of claim 1 , wherein the first semiconductor die comprises an input/output structure that is electrically connected with the logic core in the second semiconductor die.