Method for manufacturing capacitor

1 . A method for manufacturing a capacitor, the method comprising:

a groove forming step of

preparing a silicon substrate having a first surface and a second surface opposite the first surface, the silicon substrate including a capacitance generation region and a non-capacitance generation region which is a region other than the capacitance generation region when viewed along a direction connecting the first surface and the second surface and

forming a groove at a boundary between the capacitance generation region and the non-capacitance generation region, the groove being recessed from the first surface toward the second surface;

a masking layer forming step of

forming a masking layer on the first surface of the silicon substrate, the masking layer including a first masking part covering the non-capacitance generation region and a second masking part covering the capacitance generation region, and

forming a plurality of through holes extending through the second masking part in a thickness direction defined with respect to the second masking part;

a porous part forming step of

forming a porous part in the capacitance generation region of the silicon substrate by an anodic oxidation process, the porous part having fine pores, and

removing the second masking part after forming the porous part;

a dielectric layer forming step of forming a dielectric layer on inner surfaces of the fine pores; and

a conductor layer forming step of forming a conductor layer including a first conductive part and a second conductive part electrically connected to the first conductive part, the first conductive part being in contact with the dielectric layer, the second conductive part being in the capacitance generation region of the first surface.

2 . The method of claim 1 , further comprising a filling step of filling an insulative material in the groove.

3 . The method of claim 1 , further comprising a filling step of

forming an insulating layer on an inner surface of the groove and

filling a filler material in the groove provided with the insulating layer.

4 . The method of claim 1 , further comprising a filling step, wherein

the silicon substrate is a p-type semiconductor, and

the filling step includes

forming an n-type semiconductor layer on an inner surface of the groove and

filling a filler material in the groove provided with the n-type semiconductor layer.

5 . A method for manufacturing a capacitor, the method comprising:

an n-type semiconductor part forming step of

preparing a silicon substrate which is a p-type semiconductor having a first surface and a second surface opposite the first surface, the silicon substrate including a capacitance generation region and a non-capacitance generation region which is a region other than the capacitance generation region when viewed along a direction connecting the first surface and the second surface, and

forming an n-type semiconductor part at a boundary between the capacitance generation region and the non-capacitance generation region, the n-type semiconductor part extending from the first surface toward the second surface;

a masking layer forming step of

forming a masking layer on the first surface of the silicon substrate, the masking layer including a first masking part covering the non-capacitance generation region and a second masking part covering the capacitance generation region, and

forming a plurality of through holes extending through the second masking part in a thickness direction defined with respect to the second masking part;

a porous part forming step of

forming a porous part in the capacitance generation region of the silicon substrate by an anodic oxidation process, the porous part having fine pores, and

removing the second masking part after forming the porous part;

a dielectric layer forming step of forming a dielectric layer on inner surfaces of the fine pores; and

a conductor layer forming step of forming a conductor layer including a first conductive part and a second conductive part electrically connected to the first conductive part, the first conductive part being in contact with the dielectric layer, the second conductive part being in the capacitance generation region of the first surface.

6 . A method for manufacturing a capacitor, the method comprising:

a masking layer forming step of

preparing a silicon substrate having a first surface and a second surface opposite the first surface, the silicon substrate including a capacitance generation region and a non-capacitance generation region which is a region other than the capacitance generation region when viewed along a direction connecting the first surface and the second surface,

forming a masking layer on the first surface of the silicon substrate, the masking layer including a first masking part covering the non-capacitance generation region and a second masking part covering the capacitance generation region, and

forming a plurality of through holes extending through the second masking part in a thickness direction defined with respect to the second masking part;

a porous part forming step of

forming a backside electrode having a same shape as the capacitance generation region at a same location as the capacitance generation region on the second surface of the silicon substrate when viewed along a direction connecting the first surface and the second surface,

forming a porous part in the capacitance generation region of the silicon substrate by an anodic oxidation process by using the backside electrode as an anode, the porous part having fine pores, and

removing the second masking part after forming the porous part;

a dielectric layer forming step of forming a dielectric layer on inner surfaces of the fine pores; and

a conductor layer forming step of forming a conductor layer including a first conductive part and a second conductive part electrically connected to the first conductive part, the first conductive part being in contact with the dielectric layer, the second conductive part being in the capacitance generation region of the first surface.

7 . The method of claim 6 , further comprising an insulating layer forming step of forming an insulating layer on the second surface of the silicon substrate except for part of the second surface on which the backside electrode is provided.

8 . The method of claim 6 , further comprising a groove forming step of forming a groove around the backside electrode, the groove being recessed from the second surface toward the first surface.

9 . The method of claim 8 , further comprising a filling step of filling an insulative material in the groove.

10 . The method of claim 6 , wherein

the silicon substrate further has a third surface opposite the first surface, and

a distance between the third surface and the first surface is shorter than a distance between the second surface on which the backside electrode is formed and the first surface.

11 . A method for manufacturing a capacitor, the method comprising:

a masking layer forming step of

preparing a silicon substrate having a first surface and a second surface opposite the first surface, the silicon substrate including a capacitance generation region and a non-capacitance generation region which is a region other than the capacitance generation region when viewed along a direction connecting the first surface and the second surface,

forming a masking layer on the first surface of the silicon substrate, the masking layer including a first masking part covering the non-capacitance generation region and a second masking part covering the capacitance generation region, and

forming a plurality of through holes extending through the second masking part in a thickness direction defined with respect to the second masking part;

a low-resistance part forming step of forming a low-resistance part having a same shape as the capacitance generation region at a same location as the capacitance generation region in the silicon substrate when viewed along the direction connecting the first surface and the second surface, the low-resistance part having a lower specific resistance than the silicon substrate and extending from the second surface toward the first surface;

a porous part forming step of

forming a porous part in the capacitance generation region of the silicon substrate by an anodic oxidation process, the porous part having fine pores, and

removing the second masking part after forming the porous part;

a dielectric layer forming step of forming a dielectric layer on inner surfaces of the fine pores; and

a conductor layer forming step of forming a conductor layer including a first conductive part and a second conductive part electrically connected to the first conductive part, the first conductive part being in contact with the dielectric layer, the second conductive part being in the capacitance generation region of the first surface.