Semiconductor structure and method of forming the same
A semiconductor structure includes spaced apart first and second fins over a substrate, a separating wall over the substrate and having opposite first and second wall surfaces, multiple first channel features extending away from the first wall surface over the first fin such that the first channel features are spaced apart, multiple second channel features extending away from the second wall surface over the second fin such that the second channel features are spaced apart, two spaced apart first epitaxial structures on the first fin such that each first channel feature interconnects the first epitaxial structures, two spaced apart second epitaxial structures on the second fin such that each second channel feature interconnects the second epitaxial structures, and a dielectric structure including at least one bottom dielectric portion separating at least one of the first and second epitaxial structures from a corresponding first and second fins.
1 . A method of forming a semiconductor structure comprising:
forming a first active region and a second active region over a substrate such that the first active region and the second active region are spaced apart from each other;
forming a separating wall over the substrate;
forming first channel features on a first wall surface of the separating wall such that the first channel features are spaced apart from each other;
forming second channel features on a second wall surface of the separating wall opposite to the first wall surface such that the second channel features are spaced apart from each other;
forming two first epitaxial structures on the first active region such that each of the first channel features interconnects the two first epitaxial structures;
forming two second epitaxial structures on the second active region such that each of the second channel features interconnects the two second epitaxial structures; and
forming a dielectric structure to isolate the two first epitaxial structures from the two second epitaxial structures,
wherein the separating wall includes a first wall portion formed to separate the first channel features from the second channel features, and two second wall portions at two opposite sides of the first wall portion, each of the second wall portions being formed to separate one of the two first epitaxial structures from a corresponding one of the two second epitaxial structures,
wherein the dielectric structure further includes a top dielectric portion having two top dielectric segments which are respectively formed on the two second wall portions so as to prevent upper portions of the two first epitaxial structures from being merged with upper portions of the two second epitaxial structures,
wherein the top dielectric portion further has two dielectric extensions which respectively extend from the two top dielectric segments to respectively cover the two first epitaxial structures, and
wherein the dielectric structure is formed after formation of the two first epitaxial structures and before formation of the two second epitaxial structures.
2 . The method as claimed in claim 1 , wherein the dielectric structure further includes two bottom dielectric portions each of which is disposed to separate a corresponding one of the two second epitaxial structures from the second active region so as to electrically isolate lower portions of the two second epitaxial structures from lower portions of the two first epitaxial structures, each of the two bottom dielectric portions being formed before forming the two second epitaxial structures.
3 . The method as claimed in claim 1 , wherein forming the dielectric structure includes:
forming a dielectric layer to conformally cover the two first epitaxial structures, the two second wall portions of the separating wall, and two exposed portions of the second active region;
directionally treating the dielectric layer such that the dielectric layer has a treated portion which serves as the top dielectric portion and the two bottom dielectric portions, and an untreated portion; and
removing the untreated portion.
4 . The method as claimed in claim 3 , further comprising removing the two dielectric extensions and partially removing the two top dielectric segments such that each of the remaining top dielectric segments partially covers the corresponding one of the two second wall portions.
5 . The method as claimed in claim 3 , wherein directionally treating the dielectric layer is performed by introducing nitrogen, carbon, oxygen, or combinations thereof into the dielectric layer.
6 . The method as claimed in claim 3 , wherein:
forming the dielectric layer includes depositing a dielectric material; and
depositing the dielectric material and directionally treating the dielectric layer are performed in a cyclical manner.
7 . A method of forming a semiconductor structure comprising:
forming a first stacked structure and a second stacked structure over two active regions, respectively, the two active regions being spaced apart from each other and surrounded by an isolation structure;
forming a separating wall interconnecting the first stacked structure and the second stacked structure;
forming a dummy gate structure over the isolation structure, the first stacked structure, the second stacked structure, and the separating wall, each of the first stacked structure, the second stacked structure and the separating wall having two portions exposed from the dummy gate structure;
removing the two portions of the first stacked structure to form first recesses, and removing the two portions of the second stacked structure to form second recesses;
forming a dielectric layer over the first recesses, the second recesses, the two portions of the separating wall, the isolation structure and the dummy gate structure;
removing vertical portions of the dielectric layer, and leaving at least one of horizontal portions of the dielectric layer;
forming first epitaxial structures in the first recesses, respectively; and
forming second epitaxial structures in the second recesses, respectively.
8 . The method as claimed in claim 7 , wherein forming the dielectric layer includes depositing a dielectric material that serves as the dielectric layer, and performing a directional treatment to treat the horizontal portions of the dielectric layer.
9 . The method as claimed in claim 8 , wherein forming the dielectric layer includes multiple repetitions of both deposition of the dielectric material and the directional treatment.
10 . The method as claimed in claim 8 , wherein the directional treatment introduces nitrogen, carbon, oxygen, or combinations thereof into the horizontal portions of the dielectric layer.
11 . The method as claimed in claim 10 , wherein the directional treatment includes an ion implantation, a plasma treatment, or a radical treatment.
12 . The method as claimed in claim 7 , wherein the horizontal portions of the dielectric layer includes:
bottom dielectric portions that are formed in the first recesses or the second recesses;
a top dielectric portion that is formed over the separating wall;
a side dielectric portion that is formed over the isolation structure; and
a covering dielectric portion formed over the dummy gate structure and the gate spacers.
13 . The method as claimed in claim 12 , further comprising:
depositing an interlayer dielectric material over the first epitaxial structures and the second epitaxial structures; and
performing a planarization process to remove an excess amount of the interlayer dielectric material so as to form an interlayer dielectric layer, and to remove the covering dielectric portion so as to expose the dummy gate structure.
14 . A method of forming a semiconductor structure comprising:
forming a semiconductor feature which includes
a first active region and a second active region, each of which extends in a first direction, the first active region and the second active region being spaced apart from each other in a second direction different from the first direction,
an isolation structure disposed around the first active region and the second active region,
a patterned first stacked structure and a patterned second stacked structure that are disposed on the first active region and the second active region, respectively,
a separating wall disposed on the isolation structure and interconnecting the patterned first stacked structure and the patterned second stacked structure, and
a dummy gate structure extending lengthwise in the second direction, and disposed over the first active region, the second active region, the isolation structure, the patterned first stacked structure, the patterned second stacked structure and the separating wall, the first active region having two portions located on opposite sides of the dummy gate structure and exposed to first recesses, respectively, the second active region having two portions located on opposite sides of the dummy gate structure and exposed to second recesses, respectively, the separating wall having a first wall portion covered by the dummy gate structure, and two second wall portions exposed from the dummy gate structure;
depositing a dielectric layer over the semiconductor feature;
performing a directional treatment to treat horizontal portions of the dielectric layer;
removing vertical portions of the dielectric layer;
forming first epitaxial structures in the first recesses, respectively; and
forming second epitaxial structures in the second recesses, respectively.
15 . The method as claimed in claim 14 , wherein the directional treatment is performed after deposition of the dielectric layer, and before removal of the vertical portions.
16 . The method as claimed in claim 15 , wherein deposition of the dielectric layer, the directional treatment, and removal of the vertical portions are performed before forming the first epitaxial structures and the second epitaxial structures, the dielectric layer covering the second wall portions, the two portions of the first active region, the two portions of the second active region, and the isolation structure.
17 . The method as claimed in claim 16 , further comprising: after deposition of the dielectric layer and before performing the directional treatment,
forming a mask feature that covers portions of the dielectric layer corresponding to the second recesses, leaving portions of the dielectric layer corresponding to the first recesses exposed from the mask feature;
performing a removing process to remove the portions of the dielectric layer that are exposed from the mask feature; and
after the removing process, removing the mask feature.
18 . The method as claimed in claim 16 , further comprising:
after deposition of the dielectric layer and before performing the directional treatment, forming a mask feature that covers portions of the dielectric layer corresponding to the first recesses, leaving portions of the dielectric layer corresponding to the second recesses exposed from the mask feature; and
after performing the directional treatment, and before removal of the vertical portions, removing the mask feature,
wherein the portions of the dielectric layer exposed from the mask feature are untreated in the direction treatment, and removed in removing the vertical portions.
19 . The method as claimed in claim 15 , wherein:
deposition of the dielectric layer, the directional treatment, and removal of the vertical portions are performed after forming the first epitaxial structures, and before forming the second epitaxial structures; and
after removal of the vertical portions, the horizontal portions cover the second wall portions, the first epitaxial structures, the two portions of the second active region, and the isolation structure, respectively.
20 . The method as claimed in claim 19 , wherein the second epitaxial structures are formed in the second recesses and on two corresponding ones of the horizontal portions that cover the two portions of the second active region, respectively.