Semiconductor device and method for forming the same
View Patent ↗A method includes forming first and second semiconductor layers, in which a number of the first semiconductor layers is less than a number of the second semiconductor layers. Embodiments includes etching first and second semiconductor layers to form a first recess within the first semiconductor layers and a second recess within the second semiconductor layers; performing an etching process to deepen the second recess; and forming a first and second source/drain epitaxy structures in the first recess and the deepened second recess. Embodiments also includes after the first and second recesses are formed, performing a first deposition process to form first and second epitaxy layers in the first and second recesses, respectively; performing a second deposition process to form a third epitaxy layer over the first epitaxy layer; and performing a third deposition process to form fourth and fifth epitaxy layers over the third and second epitaxy layers, respectively.
1 . A method, comprising:
forming first semiconductor layers vertically stacked over a first region of a substrate and second semiconductor layers vertically stacked over a second region of the substrate, wherein a number of the first semiconductor layers is less than a number of the second semiconductor layers;
forming a first gate structure spanning over the first semiconductor layers and a second gate structure spanning over the second semiconductor layers;
etching, by using the first and second gate structures as etch masks, the first semiconductor layers and the second semiconductor layers to form a first recess within the first semiconductor layers and a second recess within the second semiconductor layers;
performing a first deposition process to form a first epitaxy layer in the first recess and a second epitaxy layer in the second recess;
forming a hard mask layer in the second recess and covering the second epitaxy layer;
performing a second deposition process to form a third epitaxy layer over the first epitaxy layer; and
performing a third deposition process to form a fourth epitaxy layer over the third epitaxy layer and a fifth epitaxy layer over the second epitaxy layer, wherein the first, second, and third epitaxy layers comprises a same material that is different from materials of the fourth and fifth epitaxy layers.
2 . The method of claim 1 , further comprising forming inner spacers between adjacent two of the first semiconductor layers and between adjacent two of the second semiconductor layers, wherein the hard mask layer is formed in contact with the inner spacers.
3 . The method of claim 1 , further comprising removing the hard mask layer prior to performing the third deposition process.
4 . The method of claim 1 , wherein top surfaces of the first and second epitaxy layers are lower than a bottommost one of the second semiconductor layers.
5 . The method of claim 4 , wherein a top surface of the third epitaxy layer is lower than a bottommost one of the first semiconductor layers.
6 . The method of claim 1 , wherein the fourth and fifth epitaxy layers have higher dopant concentrations than the first, second, and third epitaxy layers.
7 . The method of claim 1 , wherein a bottom surface of the fourth epitaxy layer is lower than a bottommost one of the first semiconductor layers and a bottom surface of the fifth epitaxy layer is lower than a bottommost one of the second semiconductor layers.
8 . A method, comprising:
forming first semiconductor layers vertically stacked over a first region of a substrate and second semiconductor layers vertically stacked over a second region of the substrate, wherein a bottommost one of the first semiconductor layers is higher than a bottommost one of the second semiconductor layers;
forming a first gate structure over the first semiconductor layers and a second gate structure over the second semiconductor layers;
etching, by using the first and second gate structures as etch masks, the first semiconductor layers and the second semiconductor layers to form a first recess within the first semiconductor layers and a second recess within the second semiconductor layers;
forming a first epitaxy layer in the first recess and a second epitaxy layer in the—second—recess, wherein the first epitaxy layer is thicker than the second epitaxy layer, comprising:
performing a first deposition process to form a first layer of the first epitaxy layer and the second epitaxy layer; and
performing a second deposition process to form a second layer of the first epitaxy layer over the first layer of the first epitaxy layer, and
forming a third epitaxy layer over the first epitaxy layer and a fourth epitaxy layer over the second epitaxy layer.
9 . The method of claim 8 , wherein the first semiconductor layers and the second semiconductor layers are made of a same material.
10 . The method of claim 8 , wherein a topmost surface of the first epitaxy layer is lower than the bottommost one of the first semiconductor layers and a topmost surface of the second epitaxy layer is lower than the bottommost one of the second semiconductor layers.
11 . The method of claim 8 , wherein forming the first epitaxy layer further comprises:
forming a mask covering the second epitaxy layer prior to performing the second deposition process; and
removing the mask once the second deposition process is complete.
12 . The method of claim 8 , wherein the third epitaxy layer is shorter than the fourth epitaxy layer.
13 . The method of claim 12 , wherein a total thickness of the first epitaxy layer and the third epitaxy layer is substantially equal to a total thickness of the second epitaxy layer and the fourth epitaxy layer.
14 . A method, comprising:
forming a semiconductor material over a first region and a second region of a substrate;
removing a portion of the semiconductor material from the second region of the substrate;
after removing the portion of the semiconductor material, forming first semiconductor layers vertically stacked over the first region of the substrate and second semiconductor layers vertically stacked over the second region of the substrate, wherein a number of the first semiconductor layers is different from a number of the second semiconductor layers;
forming a first gate structure over the first semiconductor layers and a second gate structure over the second semiconductor layers;
etching, by using the first and second gate structures as etch masks, the first semiconductor layers and the second semiconductor layers to form a first recess within the first semiconductor layers and a second recess within the second semiconductor layers;
forming a first epitaxy layer in the first recess and a second epitaxy layer in the—second—recess, wherein the first epitaxy layer is thicker than the second epitaxy layer; and
forming a third epitaxy layer over the first epitaxy layer and a fourth epitaxy layer over the second epitaxy layer, wherein an interface between the first epitaxy layer and the third epitaxy layer and an interface between the second epitaxy layer and the fourth epitaxy layer are at different levels.
15 . The method of claim 14 , wherein the first epitaxy layer is spaced apart from the first semiconductor layers and the second epitaxy layer is spaced apart from the second semiconductor layers.
16 . The method of claim 14 , wherein the third epitaxy layer interfaces with the first semiconductor layers, and the fourth epitaxy layer interfaces with the second semiconductor layers.
17 . The method of claim 14 , wherein the semiconductor material and the first semiconductor layers are made of a same material.
18 . The method of claim 14 , wherein the number of the first semiconductor layers is less than the number of the second semiconductor layers.
19 . The method of claim 14 , wherein a bottommost one of the first semiconductor layers is higher than a bottommost one of the second semiconductor layers.
20 . The method of claim 14 , wherein a topmost one of the first semiconductor layers and a topmost one of the second semiconductor layers are at a same level.