Segmented transistor active region for enhanced thermal conductivity
A semiconductor device is provided and includes a miscut substrate, intermediate layers epitaxially grown on the miscut substrate such that an uppermost surface of the intermediate layers includes surface steps, segmented active regions including nanowire channels, each of which is epitaxially grown on a corresponding one of the surface steps and a cap layer epitaxially grown on the nanowire channels and exposed portions of the uppermost surface.
1 . A semiconductor device, comprising:
a miscut substrate having a lowermost substrate surface defining a first horizontal plane and an upper substrate surface extending horizontally along a second horizontal plane, which is parallel with the first horizontal plane, with horizontally aligned miscut sections, each one of the horizontally aligned miscut sections being angled with respect to the horizontal plane;
intermediate layers epitaxially grown on the miscut substrate such that an uppermost surface of the intermediate layers, which extends horizontally along a third horizontal plane that is parallel with the first and second horizontal planes, and which comprises horizontally aligned surface steps, each one of the horizontally aligned surface steps being respectively associated with a corresponding one of the horizontally aligned miscut sections;
segmented active regions comprising nanowire channels, each of which is epitaxially grown on a corresponding one of the surface steps; and
a cap layer epitaxially grown on the nanowire channels and exposed portions of the uppermost surface.
2 . The semiconductor device according to claim 1 , wherein there is an absence of high thermal boundary resistance between the nanowire channels, the intermediate layers and the cap layer.
3 . The semiconductor device according to claim 1 , wherein:
cross-sectional shapes of the segmented active regions are one or more of triangular, square, rectangular and trapezoidal, and
the intermediate layers and the nanowire channels have various crystallographic orientations comprising at least one or more of N-polar, Ga-polar, m-plane and semipolar.
4 . The semiconductor device according to claim 1 , wherein the intermediate layers, the cap layer and the nanowire channels each comprise at least one or more of aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and alloys thereof and indium gallium nitride and alloys thereof.
5 . The semiconductor device according to claim 1 , wherein the segmented active regions are provided in multiple layers.
6 . The semiconductor device according to claim 1 , further comprising:
source and drain regions disposed in electrical communication with opposite ends of each of the nanowire channels; and
a gate structure disposed between the source and drain regions and about each of the nanowire channels.
7 . A method of building a semiconductor device, the method comprising:
providing a miscut substrate having a lowermost substrate surface defining a first horizontal plane and an upper substrate surface extending horizontally along a second horizontal plane, which is parallel with the first horizontal plane, with horizontally aligned miscut sections, each one of the horizontally aligned miscut sections being angled with respect to the horizontal plane;
epitaxially growing intermediate layers on the miscut substrate such that an uppermost surface of the intermediate layers, which extends horizontally along a third horizontal plane that is parallel with the first and second horizontal planes, and which comprises horizontally aligned surface steps, growth of each one of the horizontally aligned surface steps being respectively caused by a corresponding one of the horizontally aligned miscut sections;
epitaxially growing nanowire channels, with each nanowire channel being epitaxially grown on a corresponding one of the surface steps to form segmented active regions; and
epitaxially growing a cap layer on the nanowire channels and exposed portions of the uppermost surface.
8 . The method according to claim 7 , wherein the epitaxially growing of the intermediate layers, the nanowire channels and the cap layer comprises metalorganic chemical vapor deposition (CVD).
9 . The method according to claim 7 , wherein:
materials of the epitaxially growing of the intermediate layers, the cap layer and the nanowire channels comprise at least one or more of aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and alloys thereof and indium gallium nitride and alloys thereof, and
precursor materials comprise at least one or more of trimethylaluminium, trimethylgallium, triethylgallium, trimethylindium, triethylindium, ammonia, hydrazine, and dimethylhydrazine.
10 . The method according to claim 7 , wherein the epitaxially growing of the intermediate layers, the nanowire channels and the cap layer is continuous.
11 . The method according to claim 7 , wherein the epitaxially growing of the intermediate layers, the nanowire channels and the cap layer comprises one or more of N-polar growth, Ga-polar growth, m-plane growth and semipolar growth.
12 . The method according to claim 7 , wherein the epitaxially growing of the nanowire channels is executed such that the segmented active regions are provided in multiple layers.
13 . The method according to claim 7 , further comprising:
disposing source and drain regions in electrical communication with opposite ends of each of the nanowire channels; and
disposing a gate structure between the source and drain regions and about each of the nanowire channels.