Antimony-gallium-zinc-oxide materials
Systems, methods and apparatus are provided for transistors having a first source/drain region, a second source/drain region, and a channel region, wherein the channel region comprises an antimony-gallium-zinc-oxide (SbGZO) material.
1 . A transistor comprising:
a first source/drain region;
a second source/drain region; and
a channel region, wherein the channel region comprises a composite of an antimony-gallium-zinc-oxide (SbGZO) material and an indium gallium zinc oxide material (IGZO), wherein the SbGZO material exhibits an increased n-type doping effect with respect to a GZO material, and
wherein at least one of the first source/drain region and the second source/drain region comprises the SbGZO material.
2 . The transistor of claim 1 , wherein the SbGZO material has a formula (Sb x Ga 1-x ) 2 ZnO y .
3 . The transistor of claim 2 , wherein x has a value from 0.05 to 1.00, inclusive.
4 . The transistor of claim 1 , wherein the antimony is present in an amount from 2 to 99.9 mole % based upon a total mole % of the antimony and the indium.
5 . The transistor of claim 1 , wherein the transistor is a horizontally oriented transistor.
6 . The transistor of claim 1 , wherein the transistor is a vertically oriented transistor.
7 . The transistor of claim 1 , wherein the SbGZO material is an n-type material.
8 . The transistor of claim 1 , wherein the transistor includes a gate material.
9 . A method of making a transistor, the method comprising: forming a first source/drain region; forming a second source/drain region; and forming a channel region, wherein the channel region is located between the first source/drain region and the second source/drain region, and wherein the channel region comprises a composite of an antimony-gallium-zinc-oxide (SbGZO) material and an indium gallium zinc oxide material (IGZO), wherein the SbGZO material exhibits an increased n-type doping effect with respect to a GZO material, and wherein at least one of the first source/drain region and the second source/drain region comprises the SbGZO material.
10 . The method of claim 9 , wherein the channel region is formed with physical vapor deposition.
11 . The method of claim 9 , wherein the channel region is formed with atomic layer deposition.
12 . A memory cell, comprising: a transistor comprising: a first source/drain region; a second source/drain region; a channel region, wherein the channel region comprises a composite of an antimony-gallium-zinc-oxide (SbGZO) material and an indium gallium zinc oxide material (IGZO), wherein the SbGZO material exhibits an increased n-type doping effect with respect to a GZO material; and a storage node in operative communication with the transistor, wherein at least one of the first source/drain region and the second source/drain region comprises the SbGZO material.
13 . The memory cell of claim 12 , wherein the transistor includes a gate material.
14 . The memory cell of claim 13 , wherein the memory cell includes a substrate supporting the transistor and the storage node.
15 . The memory cell of claim 14 , wherein the first source/drain region, the second source/drain region, and the channel region, are formed on top of the gate material relative to the substrate.
16 . The memory cell of claim 14 , wherein the gate material is formed on top of the first source/drain region, the second source/drain region, and the channel region relative to the substrate.
17 . The memory cell of claim 12 , wherein the storage node comprises a capacitor.
18 . The memory cell of claim 12 , wherein the transistor is a thin-film transistor.
19 . A transistor comprising:
a first source/drain region;
a second source/drain region, wherein at least one of the first source/drain region and the second source/drain region comprises a composite of an antimony-gallium-zinc-oxide (SbGZO) material and an indium gallium zinc oxide material (IGZO), wherein the SbGZO material exhibits an increased n-type doping effect with respect to a GZO material; and
a channel region, wherein the channel region comprises the SbGZO material.
20 . The transistor of claim 19 , wherein both of the first source/drain region and the second source/drain region comprises the antimony-gallium-zinc-oxide (SbGZO) material.
21 . A transistor comprising: a first source/drain region; a second source/drain region; and a channel region comprising an oxide material doped with antimony, wherein at least one of the first source/drain region and the second source/drain region comprises a composite of an antimony-gallium-zinc-oxide (SbGZO) material and an indium gallium zinc oxide material (IGZO), and wherein the SbGZO material exhibits an increased n-type doping effect with respect to a GZO material.
22 . The transistor of claim 21 , wherein the oxide material is selected ZTO, IZO, ZnOx, InOx, In2O3, SnO2, TiOx, ZnxOyNz, MgxZnyOz, InxZnyOz, InxGayZnzOa, ZrxlnyZnzOaZrxInyZnzOa, HfxlnyZnzOaHfxInyZnzOa, SnxlnyZnzOaSnxInyZnzOa, AlxSnylnzZnaOdAlxSnyInzZnaOd, SixlnyZnzOaSixInyZnzOa, ZnxSnyOz, AlxZnySnzOa, GaxZnySnzOa, GaxZnySnzInaOd, ZrxZnySnzOa, and InGaSiO.